+2026-07-07 Richard Earnshaw <rearnsha@arm.com>
+
+ * MAINTAINERS.yml: New file.
+ * MAINTAINERS: Regenerate from MAINTAINERS.yml.
+
+2026-07-07 Richard Earnshaw <rearnsha@arm.com>
+
+ * .editorconfig (*.yaml/.yml): Add rules.
+
2026-07-06 Nina Ranns <dinka.ranns@gmail.com>
* MAINTAINERS (Write After Approval): Add myself.
+2026-07-07 Richard Earnshaw <rearnsha@arm.com>
+
+ * add-write-after.py: New file.
+
+2026-07-07 Richard Earnshaw <rearnsha@arm.com>
+
+ * gen-MAINTAINERS.py: New file.
+ * maintainer_utils.py: New file.
+ * check-MAINTAINERS.py: Delete.
+
+2026-07-07 Arsen Arsenović <aarsenovic@baylibre.com>
+
+ * download_prerequisites (gettext): Set gettext source file to
+ gettext-1.0.tar.gz.
+ * prerequisites.md5: Update gettext hash.
+ * prerequisites.sha512: Update gettext hash.
+
2026-07-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* config-list.mk (sparc64-sun-solaris2.11): Remove --with-gnu-ld.
+2026-07-07 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/aarch64/aarch64-option-extensions.def (AARCH64_OPT_EXTENSION):
+ Remove +mpamv2.
+ * config/aarch64/aarch64-sys-regs.def: Remove sysregs associated
+ with MPAMv2_VID and adjust other related sysregs to use the
+ base permitted architecture.
+ * doc/invoke.texi (aarch64: +mpamv2): Remove option.
+
+2026-07-07 Dhruv Chawla <dhruvc@nvidia.com>
+
+ * config/aarch64/aarch64-cores.def (rigel): New entry.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * doc/invoke.texi (AArch64 Options): Document the above.
+
+2026-07-07 wangjue <juewang@linux.alibaba.com>
+
+ * common/config/riscv/riscv-common.cc (riscv_option_optimization_table):
+ Enable -funroll-loops and -munroll-only-small-loops at -O2 and above.
+ * config/riscv/riscv.cc (struct riscv_tune_param): Add fields
+ small_loop_unroll_ninsns and small_loop_unroll_factor.
+ (xt_c9501_tune_info): Set them.
+ (riscv_loop_unroll_adjust): New function.
+ (riscv_option_override): Turn off -munroll-only-small-loops when
+ -funroll-loops or -funroll-all-loops is explicitly given.
+ (TARGET_LOOP_UNROLL_ADJUST): Define.
+ * config/riscv/riscv.opt (munroll-only-small-loops): New option.
+ * config/riscv/riscv.opt.urls: Regenerate.
+ * doc/invoke.texi (RISC-V Options): Document -munroll-only-small-loops.
+
+2026-07-07 Alfie Richards <alfie.richards@arm.com>
+
+ * config/aarch64/aarch64-simd.md (*aarch64_abs_plus<mode>): New
+ define_insn_and_split.
+
+2026-07-07 Kyrylo Tkachov <ktkachov@nvidia.com>
+
+ PR target/124146
+ * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
+ Ignore user alignment left on a type's main variant; use the
+ mode's natural alignment instead.
+
+2026-07-07 Kishan Parmar <kishan@linux.ibm.com>
+
+ * config/rs6000/altivec.md (UNSPEC_VUCMPRHN): New unspec entry.
+ (UNSPEC_VUCMPRLN): Likewise.
+ (UNSPEC_VUCMPRHB): Likewise.
+ (UNSPEC_VUCMPRLB): Likewise.
+ (UNSPEC_VUCMPRHH): Likewise.
+ (UNSPEC_VUCMPRLH): Likewise.
+ (UNSPEC_VUPKHSNTOB): Likewise.
+ (UNSPEC_VUPKLSNTOB): Likewise.
+ (UNSPEC_VUPKINT4TOBF16): Likewise.
+ (UNSPEC_VUPKINT8TOBF16): Likewise.
+ (UNSPEC_VUPKINT4TOFP32): Likewise.
+ (UNSPEC_VUPKINT8TOFP32): Likewise.
+ (vu_hl): New attribute.
+ (vu_lh): Likewise.
+ (VUPKNTOB): New int iterator.
+ (altivec_vupkhsntob): New define_insn.
+ (altivec_vupklsntob): Likewise.
+ (altivec_vupkint4tobf16): Likewise.
+ (altivec_vupkint8tobf16): Likewise.
+ (altivec_vupkint4tofp32): Likewise.
+ (altivec_vupkint8tofp32): Likewise.
+ (vucmpr_splat): New attribute.
+ (vucmpr_pcv): Likewise.
+ (vucmpr_uim): Likewise.
+ (VUCMPR_N): New int iterator.
+ (VUCMPR_B): Likewise.
+ (VUCMPR_H): Likewise.
+ (altivec_vucmpr<vu_hl>n): New define_expand.
+ (altivec_vucmpr<vu_hl>n_direct): New define_insn for vucmpr<vu_hl>n.
+ (altivec_vucmpr<vu_hl>b): New define_expand.
+ (altivec_vucmpr<vu_hl>b_direct): New define_insn for vucmpr<vu_hl>b.
+ (altivec_vucmpr<vu_hl>h): New define_expand.
+ (altivec_vucmpr<vu_hl>h_direct): New define_insn for vucmpr<vu_hl>h.
+ * config/rs6000/rs6000-builtins.def: Add vector uncompress and unpack
+ builtins under [future].
+ * config/rs6000/rs6000-overload.def: Add vec_uncompress* and vec_unpack*
+ interfaces.
+
+2026-07-07 Stafford Horne <shorne@gmail.com>
+
+ PR target/126081
+ * config/or1k/or1k.cc (or1k_hard_regno_mode_ok): Stop allowing
+ SImode for FLAG_REGS.
+ (or1k_can_change_mode_class): Stop allowing SImode for
+ FLAG_REGS.
+ (or1k_noce_conversion_profitable_p): Always check
+ or1k_is_cmov_insn.
+
+2026-07-07 Naveen <naveen.siddegowda@oss.qualcomm.com>
+
+ PR tree-optimization/102202
+ * tree-call-cdce.cc: Include "value-query.h" and "value-range.h".
+ (len_has_boolean_range_p): Remove.
+ (get_len_nonzero_value): New function. Return the nonzero member of
+ LEN's value range when it is a boolean range [0, 1] or an exact
+ two-value set {0, N}.
+ (can_shrink_wrap_len_p): Replace len_has_boolean_range_p call with
+ get_len_nonzero_value. Add NONZERO_LEN output parameter and set it
+ to the returned nonzero value on success.
+ (shrink_wrap_len_call): Use it to pin the length argument on the
+ guarded call path instead of build_one_cst.
+ (shrink_wrap_conditional_dead_built_in_calls): Declare local
+ nonzero_len and pass it to can_shrink_wrap_len_p and forward it to
+ shrink_wrap_len_call.
+ (pass_call_cdce::execute): Pass nullptr as NONZERO_LEN to
+ can_shrink_wrap_len_p.
+
2026-07-07 Andrew MacLeod <amacleod@redhat.com>
PR tree-optimization/125758
+2026-07-07 Egas Ribeiro <egas.g.ribeiro@gmail.com>
+
+ * except.cc (can_convert_eh): Handle a nullptr_t exception
+ caught by a pointer or pointer-to-member handler.
+
+2026-07-07 Vladislav Semykin <vladislav.semykin@gmail.com>
+
+ PR c++/125886
+ PR c++/116385
+ PR c++/68604
+ * parser.cc (cp_parser_postfix_expression): Two-pass typeid parse.
+ * pt.cc (tsubst_expr): Same for TYPEID_EXPR.
+ * rtti.cc (typeid_evaluated_p, build_typeid): Shared predicate.
+ * cp-tree.h: Declare typeid_evaluated_p.
+
2026-07-06 Marek Polacek <polacek@redhat.com>
PR c++/125901
+2026-07-07 Jerry DeLisle <jvdelisle@gcc.gnu.org>
+
+ PR fortran/103367
+ * expr.cc (simplify_const_ref): Hoist the call to
+ remove_subobject_ref up a level.
+ * primary.cc (gfc_match_rvalue): Don't copy the value expr
+ if the type is an EXPR_VARIABLE.
+ not
+ * trans-array.cc (gfc_conv_array_initializer): Only copy the expr
+ value if it does not have a ref.
+
2026-07-06 Harald Anlauf <anlauf@gmx.de>
PR fortran/121366
+2026-07-07 Egas Ribeiro <egas.g.ribeiro@gmail.com>
+
+ * g++.dg/eh/can-convert-nullptr.C: New test.
+
+2026-07-07 Vladislav Semykin <vladislav.semykin@gmail.com>
+
+ PR c++/125886
+ PR c++/116385
+ PR c++/68604
+ * g++.dg/cpp0x/pr125886.C: New test.
+ * g++.dg/rtti/typeid14.C, g++.dg/rtti/typeid15.C: New tests.
+ * g++.dg/coroutines/unevaluated.C: Drop stale xfail.
+
+2026-07-07 Jerry DeLisle <jvdelisle@gcc.gnu.org>
+
+ PR fortran/103367
+ * gfortran.dg/pr103367_2.f90: New test.
+ * gfortran.dg/pr103367_3.f90: New test.
+ * gfortran.dg/pr103367_4.f90: New test.
+
+2026-07-07 wangjue <juewang@linux.alibaba.com>
+
+ * gcc.target/riscv/unroll-explicit.c: New test.
+ * gcc.target/riscv/unroll-large-loop.c: New test.
+ * gcc.target/riscv/unroll-pragma.c: New test.
+ * gcc.target/riscv/unroll-small-loop-tune.c: New test.
+ * gcc.target/riscv/unroll-small-loop.c: New test.
+ * g++.dg/tree-prof/pr57451.C: Add -fno-unroll-loops.
+ * g++.target/riscv/pr97682.C: Likewise.
+ * gcc.dg/tree-ssa/pr117973-1.c: Likewise.
+ * gcc.dg/vect/vect-alias-check-4.c: Likewise.
+ * gcc.target/riscv/pr67731.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/pr113206-1.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-0.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-1u.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-2u.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-3u.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-4u.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls/calling-convention-1.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls/calling-convention-2.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls/calling-convention-3.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls/calling-convention-4.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls/calling-convention-5.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls/calling-convention-6.c: Likewise.
+ * gcc.target/riscv/rvv/autovec/vls/calling-convention-7.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-39.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-41.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-45.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-46.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-48.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-49.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-50.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-52.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-56.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-59.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-60.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-61.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-62.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-64.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-65.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-66.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-67.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-68.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-69.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-70.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-71.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-frm-insert-4.c: Likewise.
+ * gcc.target/riscv/rvv/base/float-point-frm-insert-5.c: Likewise.
+ * gcc.target/riscv/rvv/base/pr114352-3.c: Likewise.
+ * gcc.target/riscv/rvv/base/scalar_move-7.c: Likewise.
+ * gcc.target/riscv/rvv/base/spill-10.c: Likewise.
+ * gcc.target/riscv/rvv/base/spill-11.c: Likewise.
+ * gcc.target/riscv/rvv/base/spill-12.c: Likewise.
+ * gcc.target/riscv/rvv/base/spill-8.c: Likewise.
+ * gcc.target/riscv/rvv/base/spill-9.c: Likewise.
+ * gcc.target/riscv/rvv/base/vwaddsub-1.c: Likewise.
+ * gcc.target/riscv/rvv/base/zvbb_vandn_vx_constraint.c: Likewise.
+ * gcc.target/riscv/rvv/base/zvbc_vx_constraint-2.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-4.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/avl_single-66.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Likewise.
+ * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: Likewise.
+ * gcc.target/riscv/slt-1.c: Likewise.
+ * gcc.target/riscv/struct_vect_24.c: Likewise.
+
+2026-07-07 Alfie Richards <alfie.richards@arm.com>
+
+ * gcc.target/aarch64/add_abs.c: New test.
+
+2026-07-07 Kyrylo Tkachov <ktkachov@nvidia.com>
+
+ PR target/124146
+ * gcc.target/aarch64/pr124146.c: New test.
+ * gcc.target/aarch64/pr124146-2.c: New test.
+ * gcc.target/aarch64/pr124146-3.c: New test.
+ * gcc.target/aarch64/pr124146-4.c: New test.
+
+2026-07-07 Kishan Parmar <kishan@linux.ibm.com>
+
+ * gcc.target/powerpc/future-vucmpr-altivec.c: New test.
+ * gcc.target/powerpc/future-vucmpr-vsx.c: Likewise.
+ * gcc.target/powerpc/future-vupk.c: Likewise.
+
+2026-07-07 Richard Earnshaw <rearnsha@arm.com>
+
+ * gcc.src/maintainers.exp:
+
+2026-07-07 Stafford Horne <shorne@gmail.com>
+
+ PR target/126081
+ * gcc.target/or1k/pr126081.c: New test.
+
+2026-07-07 Naveen <naveen.siddegowda@oss.qualcomm.com>
+
+ PR tree-optimization/102202
+ * gcc.dg/pr102202-3.c: New test.
+ * gcc.dg/pr102202-4.c: New test.
+
2026-07-06 Philipp Tomsich <philipp.tomsich@vrull.eu>
PR tree-optimization/124545
+2026-07-07 Tomasz Kamiński <tkaminsk@redhat.com>
+
+ * include/std/mdspan
+ (layout_stride::mapping::mapping(const extent_type&, span<...>)):
+ Convert strides using __index_type_cast, which bring asserts
+ for negative and unrepresentable values.
+ * testsuite/23_containers/mdspan/layouts/stride_neg.cc: New test.
+
+2026-07-07 Tomasz Kamiński <tkaminsk@redhat.com>
+
+ * config/abi/pre/gnu.ver (GLIBCXX_3.4.36): Export basic_format_arg
+ _M_handle_unrecognized method of specializations of
+ format_context and wformat_context.
+ * include/std/format (basic_format_arg::_M_handle_unrecognized):
+ Declare with explicit specializations for (w)format_context
+ if _GLIBCXX_EXTERN_TEMPLATE, and define otherwise.
+ (basic_format_arg::_M_visit): Remove __type parameter, and use
+ _M_type instead. Call _M_handle_unrecognized for unrecognized
+ _Arg_t values.
+ (basic_format_arg::_M_visit_user): Remove __type parameter,
+ and use _M_type instead. Adjust calls to _M_visit.
+ (basic_format_arg::visit, std::visit_format_arg)
+ (__format::__visit_format_arg): Remove _M_type argument from
+ _M_visit(_user) calls.
+ * src/c++20/format-inst.cc
+ (basic_format_arg::_M_handle_unrecognized): Define and export
+ explicit specializations for (w)format_context.
+
+2026-07-07 Tomasz Kamiński <tkaminsk@redhat.com>
+
+ * include/bits/version.def (allocate_at_least): Add comment
+ listing papers adding values and LWG3887.
+ * include/bits/stl_iterator.h: Add comment for LWG3953.
+ * include/std/format: Add comment for LWG3892.
+ * include/std/type_traits: Add comment for LWG3655.
+
2026-07-06 Thomas Schwinge <tschwinge@baylibre.com>
Jonathan Wakely <jwakely@redhat.com>
projects / thirdparty / gcc.git / commitdiff
