arm64/sysreg: Move generation of RES0/RES1/UNKN to function

The RESx and UNKN define generation happens in two places
(EndSysreg and EndSysregFields), and was using nearly identical
code. Split this out into a function, and call that instead, rather
then keeping the dupliated code.

There are no changes to the generated sysregs as part of this change.

Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/tools/gen-sysreg.awk b/arch/arm64/tools/gen-sysreg.awk
index 5ca81eaac2cb8ae3a4a61510bbfcf267a0b55b59..86860ab672dc78433f5ed328efd552f22d41fddf 100755 (executable)
--- a/arch/arm64/tools/gen-sysreg.awk
+++ b/arch/arm64/tools/gen-sysreg.awk
@@ -66,6 +66,18 @@ function define_field_sign(prefix, reg, field, sign) {
        define(prefix, reg "_" field "_SIGNED", sign)
 }
 
+# Print the Res0, Res1, Unkn masks
+function define_resx_unkn(prefix, reg, res0, res1, unkn) {
+       if (res0 != null)
+               define(prefix, reg "_RES0", "(" res0 ")")
+       if (res1 != null)
+               define(prefix, reg "_RES1", "(" res1 ")")
+       if (unkn != null)
+               define(prefix, reg "_UNKN", "(" unkn ")")
+       if (res0 != null || res1 != null || unkn != null)
+               print ""
+}
+
 # Parse a "<msb>[:<lsb>]" string into the global variables @msb and @lsb
 function parse_bitdef(reg, field, bitdef, _bits)
 {
@@ -143,10 +155,7 @@ $1 == "EndSysregFields" && block_current() == "SysregFields" {
        if (next_bit >= 0)
                fatal("Unspecified bits in " reg)
 
-       define(prefix, reg "_RES0", "(" res0 ")")
-       define(prefix, reg "_RES1", "(" res1 ")")
-       define(prefix, reg "_UNKN", "(" unkn ")")
-       print ""
+       define_resx_unkn(prefix, reg, res0, res1, unkn)
 
        reg = null
        res0 = null
@@ -201,14 +210,7 @@ $1 == "EndSysreg" && block_current() == "Sysreg" {
        if (next_bit >= 0)
                fatal("Unspecified bits in " reg)
 
-       if (res0 != null)
-               define(prefix, reg "_RES0", "(" res0 ")")
-       if (res1 != null)
-               define(prefix, reg "_RES1", "(" res1 ")")
-       if (unkn != null)
-               define(prefix, reg "_UNKN", "(" unkn ")")
-       if (res0 != null || res1 != null || unkn != null)
-               print ""
+       define_resx_unkn(prefix, reg, res0, res1, unkn)
 
        reg = null
        op0 = null