wifi: rtw89: debug: show large MRU in txpwr_table dbgfs

Read and print the CR settings of large MRU.
For now, only RTL8922D_CID7090 support it.

For example,

[TX power limit_large_mru]
RU484_242 1TX     	-  IDX_0   IDX_1   IDX_2   IDX_3 	|  17,   0,   0,   0,	dBm
RU484_242 2TX     	-  IDX_0   IDX_1   IDX_2   IDX_3 	|  16,   0,   0,   0,	dBm
RU996_484 1TX     	-  IDX_0   IDX_1 	|   0,   0,		dBm
RU996_484 2TX     	-  IDX_0   IDX_1 	|   0,   0,		dBm
RU996_484_242 1TX 	-  IDX_0   IDX_1 	|   0,   0,		dBm
RU996_484_242 2TX 	-  IDX_0   IDX_1 	|   0,   0,		dBm

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260520123823.1792954-7-pkshih@realtek.com

diff --git a/drivers/net/wireless/realtek/rtw89/debug.c b/drivers/net/wireless/realtek/rtw89/debug.c
index c0fbb016cea451bb44af5f44df9d5d63a7543bdb..8f5af873e09f5e113573793058468a697367deba 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/debug.c
+++ b/drivers/net/wireless/realtek/rtw89/debug.c
@@ -767,6 +767,45 @@ static const struct txpwr_map __txpwr_map_lmt_ru_be = {
        .addr_to_1ss = 0, /* not support */
 };
 
+static const struct txpwr_ent __txpwr_ent_lmt_ru484_242_be[] = {
+       __GEN_TXPWR_ENT4("RU484_242 1TX     ", "IDX_0 ", "IDX_1 ", "IDX_2 ", "IDX_3 "),
+       __GEN_TXPWR_ENT4("RU484_242 2TX     ", "IDX_0 ", "IDX_1 ", "IDX_2 ", "IDX_3 "),
+};
+
+static const struct txpwr_map __txpwr_map_lmt_ru484_242_be = {
+       .ent = __txpwr_ent_lmt_ru484_242_be,
+       .size = ARRAY_SIZE(__txpwr_ent_lmt_ru484_242_be),
+       .addr_from = R_BE_TXAGC_MAX_1TX_RU484_242_0,
+       .addr_to = R_BE_TXAGC_MAX_1TX_RU484_242_0 + 4,
+       .addr_to_1ss = 0, /* not support */
+};
+
+static const struct txpwr_ent __txpwr_ent_lmt_ru996_484_be[] = {
+       __GEN_TXPWR_ENT2("RU996_484 1TX     ", "IDX_0 ", "IDX_1 "),
+       __GEN_TXPWR_ENT2("RU996_484 2TX     ", "IDX_0 ", "IDX_1 "),
+};
+
+static const struct txpwr_map __txpwr_map_lmt_ru996_484_be = {
+       .ent = __txpwr_ent_lmt_ru996_484_be,
+       .size = ARRAY_SIZE(__txpwr_ent_lmt_ru996_484_be),
+       .addr_from = R_BE_TXAGC_MAX_1TX_RU996_484_0,
+       .addr_to = R_BE_TXAGC_MAX_1TX_RU996_484_0,
+       .addr_to_1ss = 0, /* not support */
+};
+
+static const struct txpwr_ent __txpwr_ent_lmt_ru996_484_242_be[] = {
+       __GEN_TXPWR_ENT2("RU996_484_242 1TX ", "IDX_0 ", "IDX_1 "),
+       __GEN_TXPWR_ENT2("RU996_484_242 2TX ", "IDX_0 ", "IDX_1 "),
+};
+
+static const struct txpwr_map __txpwr_map_lmt_ru996_484_242_be = {
+       .ent = __txpwr_ent_lmt_ru996_484_242_be,
+       .size = ARRAY_SIZE(__txpwr_ent_lmt_ru996_484_242_be),
+       .addr_from = R_BE_TXAGC_MAX_1TX_RU996_484_242_0,
+       .addr_to = R_BE_TXAGC_MAX_1TX_RU996_484_242_0,
+       .addr_to_1ss = 0, /* not support */
+};
+
 static unsigned int
 __print_txpwr_ent(char *buf, size_t bufsz, const struct txpwr_ent *ent,
                  const s8 *bufp, const unsigned int cur, unsigned int *ate)
@@ -882,6 +921,9 @@ struct dbgfs_txpwr_table {
        const struct txpwr_map *byr;
        const struct txpwr_map *lmt;
        const struct txpwr_map *lmt_ru;
+       const struct txpwr_map *lmt_ru484_242;
+       const struct txpwr_map *lmt_ru996_484;
+       const struct txpwr_map *lmt_ru996_484_242;
 };
 
 static const struct dbgfs_txpwr_table dbgfs_txpwr_table_ax = {
@@ -894,6 +936,9 @@ static const struct dbgfs_txpwr_table dbgfs_txpwr_table_be = {
        .byr = &__txpwr_map_byr_be,
        .lmt = &__txpwr_map_lmt_be,
        .lmt_ru = &__txpwr_map_lmt_ru_be,
+       .lmt_ru484_242 = &__txpwr_map_lmt_ru484_242_be,
+       .lmt_ru996_484 = &__txpwr_map_lmt_ru996_484_be,
+       .lmt_ru996_484_242 = &__txpwr_map_lmt_ru996_484_242_be,
 };
 
 static const struct dbgfs_txpwr_table *dbgfs_txpwr_tables[RTW89_CHIP_GEN_NUM] = {
@@ -934,6 +979,8 @@ ssize_t rtw89_debug_priv_txpwr_table_get(struct rtw89_dev *rtwdev,
                                         char *buf, size_t bufsz)
 {
        enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen;
+       const struct rtw89_chip_info *chip = rtwdev->chip;
+       struct rtw89_hal *hal = &rtwdev->hal;
        struct rtw89_sar_parm sar_parm = {};
        const struct dbgfs_txpwr_table *tbl;
        const struct rtw89_chan *chan;
@@ -979,6 +1026,35 @@ ssize_t rtw89_debug_priv_txpwr_table_get(struct rtw89_dev *rtwdev,
                return n;
        p += n;
 
+       switch (chip_gen) {
+       case RTW89_CHIP_AX:
+               goto out;
+       case RTW89_CHIP_BE:
+               if (!(chip->chip_id == RTL8922D && hal->cid == RTL8922D_CID7090))
+                       goto out;
+               break;
+       default:
+               return -EOPNOTSUPP;
+       }
+
+       p += scnprintf(p, end - p, "\n[TX power limit_large_mru]\n");
+
+       n = __print_txpwr_map(rtwdev, p, end - p, tbl->lmt_ru484_242);
+       if (n < 0)
+               return n;
+       p += n;
+
+       n = __print_txpwr_map(rtwdev, p, end - p, tbl->lmt_ru996_484);
+       if (n < 0)
+               return n;
+       p += n;
+
+       n = __print_txpwr_map(rtwdev, p, end - p, tbl->lmt_ru996_484_242);
+       if (n < 0)
+               return n;
+       p += n;
+
+out:
        return p - buf;
 }