MIPS: Loongson64: DTS: Fix PCIe port nodes for ls7a

[ Upstream commit d89a415ff8d5e0aad4963f2d8ebb0f9e8110b7fa ]

Add various required properties to silent warnings:

arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi:116.16-297.5: Warning (interrupt_provider): /bus@10000000/pci@1a000000: '#interrupt-cells' found, but node is not an interrupt provider
arch/mips/boot/dts/loongson/loongson64_2core_2k1000.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider'

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Stable-dep-of: dbb69b9d6234 ("MIPS: dts: loongson: Fix liointc IRQ polarity")
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
index c0be84a6e81fdd2ff206d5facfbc4c8ac1a49925..c1d3092fdd87012d071cd1368873dc143dce16e7 100644 (file)
--- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
@@ -117,7 +117,6 @@
                        device_type = "pci";
                        #address-cells = <3>;
                        #size-cells = <2>;
-                       #interrupt-cells = <2>;
 
                        reg = <0 0x1a000000 0 0x02000000>,
                                <0xfe 0x00000000 0 0x20000000>;
@@ -205,93 +204,117 @@
                                interrupt-parent = <&liointc0>;
                        };
 
-                       pci_bridge@9,0 {
+                       pcie@9,0 {
                                compatible = "pci0014,7a19.0",
                                                   "pci0014,7a19",
                                                   "pciclass060400",
                                                   "pciclass0604";
 
                                reg = <0x4800 0x0 0x0 0x0 0x0>;
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               device_type = "pci";
                                #interrupt-cells = <1>;
                                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
                                interrupt-parent = <&liointc1>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>;
+                               ranges;
                                external-facing;
                        };
 
-                       pci_bridge@a,0 {
+                       pcie@a,0 {
                                compatible = "pci0014,7a09.0",
                                                   "pci0014,7a09",
                                                   "pciclass060400",
                                                   "pciclass0604";
 
                                reg = <0x5000 0x0 0x0 0x0 0x0>;
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               device_type = "pci";
                                #interrupt-cells = <1>;
                                interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
                                interrupt-parent = <&liointc1>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>;
+                               ranges;
                                external-facing;
                        };
 
-                       pci_bridge@b,0 {
+                       pcie@b,0 {
                                compatible = "pci0014,7a09.0",
                                                   "pci0014,7a09",
                                                   "pciclass060400",
                                                   "pciclass0604";
 
                                reg = <0x5800 0x0 0x0 0x0 0x0>;
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               device_type = "pci";
                                #interrupt-cells = <1>;
                                interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                                interrupt-parent = <&liointc1>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>;
+                               ranges;
                                external-facing;
                        };
 
-                       pci_bridge@c,0 {
+                       pcie@c,0 {
                                compatible = "pci0014,7a09.0",
                                                   "pci0014,7a09",
                                                   "pciclass060400",
                                                   "pciclass0604";
 
                                reg = <0x6000 0x0 0x0 0x0 0x0>;
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               device_type = "pci";
                                #interrupt-cells = <1>;
                                interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
                                interrupt-parent = <&liointc1>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>;
+                               ranges;
                                external-facing;
                        };
 
-                       pci_bridge@d,0 {
+                       pcie@d,0 {
                                compatible = "pci0014,7a19.0",
                                                   "pci0014,7a19",
                                                   "pciclass060400",
                                                   "pciclass0604";
 
                                reg = <0x6800 0x0 0x0 0x0 0x0>;
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               device_type = "pci";
                                #interrupt-cells = <1>;
                                interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
                                interrupt-parent = <&liointc1>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>;
+                               ranges;
                                external-facing;
                        };
 
-                       pci_bridge@e,0 {
+                       pcie@e,0 {
                                compatible = "pci0014,7a09.0",
                                                   "pci0014,7a09",
                                                   "pciclass060400",
                                                   "pciclass0604";
 
                                reg = <0x7000 0x0 0x0 0x0 0x0>;
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               device_type = "pci";
                                #interrupt-cells = <1>;
                                interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
                                interrupt-parent = <&liointc1>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>;
+                               ranges;
                                external-facing;
                        };