arm64: dts: allwinner: a523: Add NPU device node

The Allwinner T527 SoC has an NPU built in. Based on identifiers found
in the BSP, it is a Vivante IP block. After enabling it, the etnaviv
driver reports it as a GC9000 revision 9003.

The standard bindings are used as everything matches directly. There is
no option for DVFS at the moment. That might require some more work,
perhaps on the efuse side to map speed bins.

It is unclear whether the NPU block is fused out at the hardware level
or the BSP limits use of the NPU through software, as the author only
has boards with the T527.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250911174710.3149589-8-wens@kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index a5100e5d19aaa4c501ed897f8352993ec8a246be..d00da1cd744e96257e0021355fc3821aae2ea721 100644 (file)
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -717,5 +717,17 @@
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                };
+
+               npu: npu@7122000 {
+                       compatible = "vivante,gc";
+                       reg = <0x07122000 0x1000>;
+                       interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&mcu_ccu CLK_BUS_MCU_NPU_ACLK>,
+                                <&ccu CLK_NPU>,
+                                <&mcu_ccu CLK_BUS_MCU_NPU_HCLK>;
+                       clock-names = "bus", "core", "reg";
+                       resets = <&mcu_ccu RST_BUS_MCU_NPU>;
+                       power-domains = <&ppu PD_NPU>;
+               };
        };
 };