spi: zynqmp_qspi: Remove older way of determining qspi modes

Remove older way determining qspi flash connection modes as its
now moved to getting the same info from device tree.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/cpu/armv8/zynqmp/Makefile b/arch/arm/cpu/armv8/zynqmp/Makefile
index 013f136707b5ce891bbaae529fbd2259174d8a39..72dee3ded48f4c6213a90f8a68f5f1bafb9adc2f 100644 (file)
--- a/arch/arm/cpu/armv8/zynqmp/Makefile
+++ b/arch/arm/cpu/armv8/zynqmp/Makefile
@@ -8,5 +8,4 @@
 obj-y  += clk.o
 obj-y  += cpu.o
 obj-$(CONFIG_MP)       += mp.o
-obj-y  += slcr.o
 obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o

diff --git a/arch/arm/cpu/armv8/zynqmp/slcr.c b/arch/arm/cpu/armv8/zynqmp/slcr.c
deleted file mode 100644 (file)
index e287a8b..0000000
--- a/arch/arm/cpu/armv8/zynqmp/slcr.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * (C) Copyright 2014 - 2015 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <malloc.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/clk.h>
-
-#define SLCR_QSPI_ENABLE       0x02
-#define SLCR_QSPI_ENABLE_MASK  0x03
-
-/*
- * zynq_slcr_mio_get_status - Get the status of MIO peripheral.
- *
- * @peri_name: Name of the peripheral for checking MIO status
- * @get_pins: Pointer to array of get pin for this peripheral
- * @num_pins: Number of pins for this peripheral
- * @mask: Mask value
- * @check_val: Required check value to get the status of  periph
- */
-struct zynq_slcr_mio_get_status {
-       const char *peri_name;
-       const int *get_pins;
-       int num_pins;
-       u32 mask;
-       u32 check_val;
-};
-
-static const int qspi0_pins[] = {
-       0, 1, 2, 3, 4, 5
-};
-
-static const int qspi1_cs_pin[] = {
-       7
-};
-
-static const int qspi1_pins[] = {
-       8, 9, 10, 11, 12
-};
-
-static const struct zynq_slcr_mio_get_status mio_periphs[] = {
-       {
-               "qspi0",
-               qspi0_pins,
-               ARRAY_SIZE(qspi0_pins),
-               SLCR_QSPI_ENABLE_MASK,
-               SLCR_QSPI_ENABLE,
-       },
-       {
-               "qspi1_cs",
-               qspi1_cs_pin,
-               ARRAY_SIZE(qspi1_cs_pin),
-               SLCR_QSPI_ENABLE_MASK,
-               SLCR_QSPI_ENABLE,
-       },
-       {
-               "qspi1",
-               qspi1_pins,
-               ARRAY_SIZE(qspi1_pins),
-               SLCR_QSPI_ENABLE_MASK,
-               SLCR_QSPI_ENABLE,
-       },
-};
-
-/*
- * zynq_slcr_get_mio_pin_status - Get the MIO pin status of peripheral.
- *
- * @periph: Name of the peripheral
- *
- * Returns count to indicate the number of pins configured for the
- * given @periph.
- */
-int zynq_slcr_get_mio_pin_status(const char *periph)
-{
-       const struct zynq_slcr_mio_get_status *mio_ptr;
-       int val, i, j;
-       int mio = 0;
-
-       for (i = 0; i < ARRAY_SIZE(mio_periphs); i++) {
-               if (strcmp(periph, mio_periphs[i].peri_name) == 0) {
-                       mio_ptr = &mio_periphs[i];
-                       for (j = 0; j < mio_ptr->num_pins; j++) {
-                               val = readl(&slcr_base->mio_pin
-                                               [mio_ptr->get_pins[j]]);
-                               if ((val & mio_ptr->mask) == mio_ptr->check_val)
-                                       mio++;
-                       }
-                       break;
-               }
-       }
-
-       return mio;
-}

diff --git a/drivers/spi/zynqmp_qspi.c b/drivers/spi/zynqmp_qspi.c
index 3eee5e4d532babc26eef1ee433ddee64df4d99f4..df0c3bc2bf5d59add06cf5ee580c2d587915c7ba 100644 (file)
--- a/drivers/spi/zynqmp_qspi.c
+++ b/drivers/spi/zynqmp_qspi.c
@@ -371,26 +371,6 @@ static int zynqmp_qspi_child_pre_probe(struct udevice *bus)
        return 0;
 }
 
-static void zynqmp_qspi_check_is_dual_flash(struct zynqmp_qspi_priv *priv)
-{
-       int lower_mio = 0, upper_mio = 0, upper_mio_cs1 = 0;
-
-       lower_mio = zynq_slcr_get_mio_pin_status("qspi0");
-       if (lower_mio == ZYNQMP_QSPI_MIO_NUM_QSPI0)
-               priv->is_dual = SF_SINGLE_FLASH;
-
-       upper_mio_cs1 = zynq_slcr_get_mio_pin_status("qspi1_cs");
-       if ((lower_mio == ZYNQMP_QSPI_MIO_NUM_QSPI0) &&
-           (upper_mio_cs1 == ZYNQMP_QSPI_MIO_NUM_QSPI1_CS))
-               priv->is_dual = SF_DUAL_STACKED_FLASH;
-
-       upper_mio = zynq_slcr_get_mio_pin_status("qspi1");
-       if ((lower_mio == ZYNQMP_QSPI_MIO_NUM_QSPI0) &&
-           (upper_mio_cs1 == ZYNQMP_QSPI_MIO_NUM_QSPI1_CS) &&
-           (upper_mio == ZYNQMP_QSPI_MIO_NUM_QSPI1))
-               priv->is_dual = SF_DUAL_PARALLEL_FLASH;
-}
-
 static int zynqmp_qspi_probe(struct udevice *bus)
 {
        struct zynqmp_qspi_platdata *plat = dev_get_platdata(bus);
@@ -400,7 +380,6 @@ static int zynqmp_qspi_probe(struct udevice *bus)
 
        priv->regs = plat->regs;
        priv->dma_regs = plat->dma_regs;
-       zynqmp_qspi_check_is_dual_flash(priv);
        priv->is_dual = plat->is_dual;
 
        if (priv->is_dual == -1) {