ramips: ethernet: ralink: fix MT7620A_GDMA regs

Registers in MT7620A_GDMA_OFFSET range were incorrect, except for the
first one GDM_FWD_CFG (which is actually the only one in use).
The next and last register is GDM_SHPR_CFG. All others are not mentioned
in docs.

Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23933
Signed-off-by: Robert Marko <robimarko@gmail.com>

diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
index 151caae1dcc3aeb2c7b82d8ff3f3160158af142a..95f4af25547c21ab09331f062d850e04fa7976a3 100644 (file)
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
@@ -151,10 +151,7 @@ enum fe_work_flag {
 #define MT7620A_GDMA_OFFSET            0x0600
 #endif
 #define        MT7620A_GDMA1_FWD_CFG           (MT7620A_GDMA_OFFSET + 0x00)
-#define MT7620A_FE_GDMA1_SCH_CFG       (MT7620A_GDMA_OFFSET + 0x04)
-#define MT7620A_FE_GDMA1_SHPR_CFG      (MT7620A_GDMA_OFFSET + 0x08)
-#define MT7620A_FE_GDMA1_MAC_ADRL      (MT7620A_GDMA_OFFSET + 0x0C)
-#define MT7620A_FE_GDMA1_MAC_ADRH      (MT7620A_GDMA_OFFSET + 0x10)
+#define MT7620A_FE_GDMA1_SHPR_CFG      (MT7620A_GDMA_OFFSET + 0x04)
 
 #define RT5350_TX_BASE_PTR0    (RT5350_PDMA_OFFSET + 0x00)
 #define RT5350_TX_MAX_CNT0     (RT5350_PDMA_OFFSET + 0x04)