Revert "iommu/vt-d: Preset Access/Dirty bits for IOVA over FL"

This reverts commit 416fa531c8160151090206a51b829b9218b804d9 which is
commit a8ce9ebbecdfda3322bbcece6b3b25888217f8e3 upstream as it was
backported incorrectly and is causing problems for some systems.

Reported-by: Wolfgang Müller <wolf@oriole.systems>
Reported-by: Charles Wright <charles@charleswright.co>
Reported-by: Christoph Biedl <linux-kernel.bfrz@manchmal.in-ulm.de>
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Lu Baolu <baolu.lu@linux.intel.com>
Cc: Joerg Roedel <jroedel@suse.de>
Cc: Sasha Levin <sashal@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 2c8aa60c36d187ff5a60d4da5f272aa6b550ac65..4ef25c21b39bdef711b32a8c04de206013cc3305 100644 (file)
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -1028,11 +1028,8 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
 
                        domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE);
                        pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE;
-                       if (domain_use_first_level(domain)) {
+                       if (domain_use_first_level(domain))
                                pteval |= DMA_FL_PTE_XD | DMA_FL_PTE_US;
-                               if (domain->domain.type == IOMMU_DOMAIN_DMA)
-                                       pteval |= DMA_FL_PTE_ACCESS;
-                       }
                        if (cmpxchg64(&pte->val, 0ULL, pteval))
                                /* Someone else set it while we were thinking; use theirs. */
                                free_pgtable_page(tmp_page);
@@ -2362,18 +2359,14 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
                return -EINVAL;
 
        attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP);
-       if (domain_use_first_level(domain)) {
+       if (domain_use_first_level(domain))
                attr |= DMA_FL_PTE_PRESENT | DMA_FL_PTE_XD | DMA_FL_PTE_US;
 
-               if (domain->domain.type == IOMMU_DOMAIN_DMA) {
-                       attr |= DMA_FL_PTE_ACCESS;
-                       if (prot & DMA_PTE_WRITE)
-                               attr |= DMA_FL_PTE_DIRTY;
-               }
+       if (!sg) {
+               sg_res = nr_pages;
+               pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | attr;
        }
 
-       pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | attr;
-
        while (nr_pages > 0) {
                uint64_t tmp;
 

diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index c00ee3458a919370045b4665b28c1ad72e7aa343..0f37afbb04392a31bfc59bd9761ee2b575783e42 100644 (file)
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -42,8 +42,6 @@
 
 #define DMA_FL_PTE_PRESENT     BIT_ULL(0)
 #define DMA_FL_PTE_US          BIT_ULL(2)
-#define DMA_FL_PTE_ACCESS      BIT_ULL(5)
-#define DMA_FL_PTE_DIRTY       BIT_ULL(6)
 #define DMA_FL_PTE_XD          BIT_ULL(63)
 
 #define ADDR_WIDTH_5LEVEL      (57)