arm64: dts: ti: k3-j784s4-j742s2-evm-common: Enable DisplayPort-1

Enable DSI display for J784S4 EVM.

Add DT node for DSI-to-eDP bridge. The DSI to eDP bridge is
SN65DSI86 on the board.

Add the endpoint nodes to describe connection from:
DSS => DSI => SN65DSI86 bridge => DisplayPort-1

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Tested-by: Harikrishna Shenoy <h-shenoy@ti.com>
Reviewed-by: Harikrishna Shenoy <h-shenoy@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250716060114.52122-3-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
index fa656b7b13a1d68af0cb0d95f67cee0b9c496023..6afa802544e9ff6b190a06b90c85f32b2687cf60 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
@@ -301,6 +301,52 @@
                clock-names = "cpb-mcasp-auxclk", "cpb-mcasp-auxclk-48000",
                              "cpb-codec-scki", "cpb-codec-scki-48000";
        };
+
+       vsys_io_1v8: regulator-vsys-io-1v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "vsys_io_1v8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       vsys_io_1v2: regulator-vsys-io-1v2 {
+               compatible = "regulator-fixed";
+               regulator-name = "vsys_io_1v2";
+               regulator-min-microvolt = <1200000>;
+               regulator-max-microvolt = <1200000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       edp1_refclk: clock-edp1-refclk {
+               compatible = "fixed-clock";
+               clock-frequency = <19200000>;
+               #clock-cells = <0>;
+       };
+
+       dp1_pwr_3v3: regulator-dp1-prw {
+               compatible = "regulator-fixed";
+               regulator-name = "dp1-pwr";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&exp4 1 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       dp1: connector-dp1 {
+               compatible = "dp-connector";
+               label = "DP1";
+               type = "full-size";
+               dp-pwr-supply = <&dp1_pwr_3v3>;
+
+               port {
+                       dp1_connector_in: endpoint {
+                               remote-endpoint = <&dp1_out>;
+                       };
+               };
+       };
 };
 
 &wkup_gpio0 {
@@ -1340,12 +1386,26 @@
 };
 
 &dss_ports {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
        /* DP */
-       port {
+       port@0 {
+               reg = <0>;
+
                dpi0_out: endpoint {
                        remote-endpoint = <&dp0_in>;
                };
        };
+
+       /* DSI */
+       port@2 {
+               reg = <2>;
+
+               dpi2_out: endpoint {
+                       remote-endpoint = <&dsi0_in>;
+               };
+       };
 };
 
 &main_i2c4 {
@@ -1360,6 +1420,65 @@
                gpio-controller;
                #gpio-cells = <2>;
        };
+
+       bridge_dsi_edp: bridge-dsi-edp@2c {
+               compatible = "ti,sn65dsi86";
+               reg = <0x2c>;
+               clock-names = "refclk";
+               clocks = <&edp1_refclk>;
+               enable-gpios = <&exp4 2 GPIO_ACTIVE_HIGH>;
+               vpll-supply = <&vsys_io_1v8>;
+               vccio-supply = <&vsys_io_1v8>;
+               vcca-supply = <&vsys_io_1v2>;
+               vcc-supply = <&vsys_io_1v2>;
+
+               dsi_edp_bridge_ports: ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               dp1_in: endpoint {
+                                       remote-endpoint = <&dsi0_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+
+                               dp1_out: endpoint {
+                                       remote-endpoint = <&dp1_connector_in>;
+                               };
+                       };
+               };
+       };
+};
+
+&dsi0_ports {
+       port@0 {
+               reg = <0>;
+
+               dsi0_out: endpoint {
+                       remote-endpoint = <&dp1_in>;
+               };
+       };
+
+       port@1 {
+               reg = <1>;
+
+               dsi0_in: endpoint {
+                       remote-endpoint = <&dpi2_out>;
+               };
+       };
+};
+
+&dphy_tx0 {
+       status = "okay";
+};
+
+&dsi0 {
+       status = "okay";
 };
 
 &dp0_ports {