zynq-zybo.dtb \
zynq-microzed.dtb \
zynq-cc108.dtb \
- zynq-afx-nand.dtb \
- zynq-afx-nor.dtb \
- zynq-afx-qspi.dtb \
zynq-picozed.dtb \
zynq-zc770-xm010.dtb \
zynq-zc770-xm011.dtb \
+++ /dev/null
-/*
- * Xilinx ATF nand board DTS
- *
- * (C) Copyright 2007-2013 Xilinx, Inc.
- * (C) Copyright 2007-2013 Michal Simek
- * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-/dts-v1/;
-/include/ "zynq-7000.dtsi"
-
-/ {
- compatible = "xlnx,zynq-afx-nand", "xlnx,zynq-7000";
- model = "Xilinx Zynq";
-
- aliases {
- serial0 = &uart1;
- };
-
- chosen {
- bootargs = "";
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x8000000>;
- };
-};
-
-&smcc {
- status = "okay";
- arm,addr25 = <0x0>;
- arm,nor-chip-sel0 = <0x0>;
- arm,nor-chip-sel1 = <0x0>;
- arm,sram-chip-sel0 = <0x0>;
- arm,sram-chip-sel1 = <0x0>;
-};
-
-&nand0 {
- status = "okay";
- arm,nand-cycle-t0 = <0x4>;
- arm,nand-cycle-t1 = <0x4>;
- arm,nand-cycle-t2 = <0x1>;
- arm,nand-cycle-t3 = <0x2>;
- arm,nand-cycle-t4 = <0x2>;
- arm,nand-cycle-t5 = <0x2>;
- arm,nand-cycle-t6 = <0x4>;
- partition@nand-fsbl-uboot {
- label = "nand-fsbl-uboot";
- reg = <0x0 0x100000>;
- };
- partition@nand-linux {
- label = "nand-linux";
- reg = <0x100000 0x500000>;
- };
- partition@nand-device-tree {
- label = "nand-device-tree";
- reg = <0x600000 0x20000>;
- };
- partition@nand-rootfs {
- label = "nand-rootfs";
- reg = <0x620000 0x5E0000>;
- };
- partition@nand-bitstream {
- label = "nand-bitstream";
- reg = <0xC00000 0x400000>;
- };
-};
-
-&uart1 {
- status = "okay";
-};
+++ /dev/null
-/*
- * Xilinx ATF nor board DTS
- *
- * (C) Copyright 2007-2013 Xilinx, Inc.
- * (C) Copyright 2007-2013 Michal Simek
- * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-/dts-v1/;
-/include/ "zynq-7000.dtsi"
-
-/ {
- compatible = "xlnx,zynq-afx-nor", "xlnx,zynq-7000";
- model = "Xilinx Zynq";
-
- aliases {
- serial0 = &uart1;
- };
-
- chosen {
- bootargs = "";
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x8000000>;
- };
-};
-
-&smcc {
- status = "okay";
- arm,addr25 = <0x1>;
- arm,nor-chip-sel0 = <0x1>;
- arm,nor-chip-sel1 = <0x0>;
- arm,sram-chip-sel0 = <0x0>;
- arm,sram-chip-sel1 = <0x0>;
-};
-
-&nor0 {
- status = "okay";
- bank-width = <1>;
- xlnx,sram-cycle-t0 = <0xb>;
- xlnx,sram-cycle-t1 = <0xb>;
- xlnx,sram-cycle-t2 = <0x5>;
- xlnx,sram-cycle-t3 = <0x4>;
- xlnx,sram-cycle-t4 = <0x3>;
- xlnx,sram-cycle-t5 = <0x3>;
- xlnx,sram-cycle-t6 = <0x2>;
- partition@nor-fsbl-uboot {
- label = "nor-fsbl-uboot";
- reg = <0x0 0x100000>;
- };
- partition@nor-linux {
- label = "nor-linux";
- reg = <0x100000 0x500000>;
- };
- partition@nor-device-tree {
- label = "nor-device-tree";
- reg = <0x600000 0x20000>;
- };
- partition@nor-rootfs {
- label = "nor-rootfs";
- reg = <0x620000 0x5E0000>;
- };
- partition@nor-bitstream {
- label = "nor-bitstream";
- reg = <0xC00000 0x400000>;
- };
-};
-
-&uart1 {
- status = "okay";
-};
+++ /dev/null
-/*
- * Device Tree Generator version: 1.1
- *
- * (C) Copyright 2007-2013 Xilinx, Inc.
- * (C) Copyright 2007-2013 Michal Simek
- * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * CAUTION: This file is automatically generated by libgen.
- * Version: Xilinx EDK 14.5 EDK_P.58f
- *
- */
-/dts-v1/;
-/include/ "zynq-7000.dtsi"
-
-/ {
- compatible = "xlnx,zynq-afx-qspi", "xlnx,zynq-7000";
- model = "Xilinx Zynq";
-
- aliases {
- serial0 = &uart1;
- spi0 = &qspi;
- };
-
- chosen {
- bootargs = "root=/dev/ram rw earlyprintk";
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x8000000>;
- };
-};
-
-&smcc {
- status = "okay";
- arm,addr25 = <0x1>;
- arm,nor-chip-sel0 = <0x1>;
- arm,nor-chip-sel1 = <0x0>;
- arm,sram-chip-sel0 = <0x0>;
- arm,sram-chip-sel1 = <0x0>;
-};
-
-&qspi {
- status = "okay";
- is-dual = <0>;
- num-cs = <1>;
- flash@0 {
- compatible = "is25lp128";
- reg = <0x0>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- spi-max-frequency = <50000000>;
- #address-cells = <1>;
- #size-cells = <1>;
- partition@qspi-fsbl-uboot {
- label = "qspi-fsbl-uboot";
- reg = <0x0 0x100000>;
- };
- partition@qspi-linux {
- label = "qspi-linux";
- reg = <0x100000 0x500000>;
- };
- partition@qspi-device-tree {
- label = "qspi-device-tree";
- reg = <0x600000 0x20000>;
- };
- partition@qspi-rootfs {
- label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
- };
- partition@qspi-bitstream {
- label = "qspi-bitstream";
- reg = <0xC00000 0x400000>;
- };
- };
-};
-
-&uart1 {
- status = "okay";
-};
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_ARCH_ZYNQ=y
-CONFIG_DEFAULT_DEVICE_TREE="zynq-afx-nand"
-CONFIG_SYS_EXTRA_OPTIONS="AFX_NAND"
-CONFIG_SYS_PROMPT="Zynq> "
-# CONFIG_CMD_IMLS is not set
-CONFIG_OF_EMBED=y
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_ARCH_ZYNQ=y
-CONFIG_DEFAULT_DEVICE_TREE="zynq-afx-nor"
-CONFIG_SYS_EXTRA_OPTIONS="AFX_NOR"
-CONFIG_SYS_PROMPT="Zynq> "
-CONFIG_OF_EMBED=y
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_ARCH_ZYNQ=y
-CONFIG_DEFAULT_DEVICE_TREE="zynq-afx-qspi"
-CONFIG_SYS_PROMPT="Zynq> "
-# CONFIG_CMD_IMLS is not set
-CONFIG_OF_EMBED=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_BAR=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_ZYNQ_QSPI=y
+++ /dev/null
-/*
- * (C) Copyright 2012 Xilinx
- *
- * Configuration settings for the Xilinx Zynq AFX board.
- * See zynq-common.h for Zynq common configs
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_ZYNQ_AFX_H
-#define __CONFIG_ZYNQ_AFX_H
-
-#define CONFIG_SYS_NO_FLASH
-#if defined(CONFIG_AFX_NOR)
-# undef CONFIG_SYS_NO_FLASH
-#elif defined(CONFIG_AFX_NAND)
-# define CONFIG_NAND_ZYNQ
-#endif
-
-#include <configs/zynq-common.h>
-
-#endif /* __CONFIG_ZYNQ_AFX_H */