#define CMD24 (24) /* WRITE_BLOCK */
#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
#define CMD41 (41) /* SEND_OP_COND (ACMD) */
+#define CMD51 (51) /* SEND_SCR (ACMD) */
#define CMD52 (52) /* */
#define CMD55 (55) /* APP_CMD */
#define CMD58 (58) /* READ_OCR */
case CMD41:
retval |= RSP_R3;
break;
+ case CMD51:
+ retval |= RSP_R1;
+ break;
case CMD52:
case CMD55:
retval |= RSP_R1;
}
}
- cmd->response[0] = sd_in32(SD_RSP_R);
- cmd->response[1] = sd_in32(SD_RSP_R+4);
- cmd->response[2] = sd_in32(SD_RSP_R+8);
- cmd->response[3] = sd_in32(SD_RSP_R+12);
+ if (cmd->resp_type == MMC_RSP_R2) {
+ int i;
+
+ /* RESP_136 */
+ /* CRC is stripped so we need to do some shifting. */
+ for (i = 0;i < 4;i++) {
+ cmd->response[i] = sd_in32(SD_RSP_R + (3-i)*4) << 8;
+ if (i != 3) {
+ cmd->response[i] |=
+ sd_in8((SD_RSP_R + (3-i)*4)-1);
+ }
+ }
+ } else {
+ /* RESP_48 */
+ cmd->response[0] = sd_in32(SD_RSP_R);
+ }
if (cmdreg & SD_CMD_DATA) {
memcpy(data->dest, sd_dma_buffer, 512);
static void pele_sdh_set_ios(struct mmc *mmc)
{
+#ifdef DEBUG
+ printf("%s: voltages: 0x%x clock: 0x%x bus_width: 0x%x\n", __FUNCTION__,
+ mmc->voltages, mmc->clock, mmc->bus_width);
+#endif
}
static int pele_sdh_init(struct mmc *mmc)
{
mmc->host_caps = MMC_MODE_4BIT;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
-#if 0
- mmc->f_max = get_sclk();
+
+ mmc->f_max = 52000000;
mmc->f_min = mmc->f_max >> 9;
-#endif
+
mmc->block_dev.part_type = PART_TYPE_DOS;
mmc_register(mmc);