]> git.ipfire.org Git - thirdparty/glibc.git/commitdiff
[AArch64] Remove ISB after FPCR write.
authorWilco <wdijkstr@arm.com>
Mon, 2 Jun 2014 11:44:21 +0000 (12:44 +0100)
committerMarcus Shawcroft <marcus.shawcroft@arm.com>
Mon, 2 Jun 2014 11:44:21 +0000 (12:44 +0100)
ChangeLog
sysdeps/aarch64/fpu/fpu_control.h

index b20156cb0c4ac8897b89d7f5d2ed714f82d17f90..8a55607df7300573e2448edc7ced15bdaa34a327 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2014-06-02  Wilco  <wdijkstr@arm.com>
+
+       * sysdeps/aarch64/fpu/fpu_control.h (_FPU_SETCW): Remove ISB after
+       FPCR write.
+
 2014-06-02  Wilco  <wdijkstr@arm.com>
 
        [BZ #17009]
index 6a265e89b5e11706d8f01b07fbec8d2a519a9bd2..d5a890d9907e1280af93481c5255de1185e95cf1 100644 (file)
 #define _FPU_GETCW(fpcr) \
   __asm__ __volatile__ ("mrs   %0, fpcr" : "=r" (fpcr))
 
-#define _FPU_SETCW(fpcr)                                  \
-  {                                                       \
-    __asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr)); \
-    __asm__ __volatile__ ("isb");                         \
-  }
+#define _FPU_SETCW(fpcr) \
+  __asm__ __volatile__ ("msr   fpcr, %0" : : "r" (fpcr))
 
 #define _FPU_GETFPSR(fpsr) \
   __asm__ __volatile__ ("mrs   %0, fpsr" : "=r" (fpsr))