arm64: dts: qcom: qcm6490-idp: Add WSA8830 speakers and WCD9370 headset codec

Add nodes for WSA8830 speakers and WCD9370 headset codec
on qcm6490-idp board and enable lpass macros along with
audio support pin controls.

Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250903151337.1037246-8-mohammad.rafi.shaik@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
index 8ed6e28b0c2977b831a1f156014eb9d6f70d0243..379ee346a33a47acaf0998ee5af376344a586204 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
@@ -18,6 +18,7 @@
 #include "pm7325.dtsi"
 #include "pm8350c.dtsi"
 #include "pmk8350.dtsi"
+#include "qcs6490-audioreach.dtsi"
 
 /delete-node/ &ipa_fw_mem;
 /delete-node/ &rmtfs_mem;
@@ -169,6 +170,30 @@
                regulator-min-microvolt = <3700000>;
                regulator-max-microvolt = <3700000>;
        };
+
+       wcd9370: audio-codec-0 {
+               compatible = "qcom,wcd9370-codec";
+
+               pinctrl-0 = <&wcd_default>;
+               pinctrl-names = "default";
+
+               reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
+
+               vdd-buck-supply = <&vreg_l17b_1p7>;
+               vdd-rxtx-supply = <&vreg_l18b_1p8>;
+               vdd-px-supply = <&vreg_l18b_1p8>;
+               vdd-mic-bias-supply = <&vreg_bob_3p296>;
+
+               qcom,micbias1-microvolt = <1800000>;
+               qcom,micbias2-microvolt = <1800000>;
+               qcom,micbias3-microvolt = <1800000>;
+               qcom,micbias4-microvolt = <1800000>;
+
+               qcom,rx-device = <&wcd937x_rx>;
+               qcom,tx-device = <&wcd937x_tx>;
+
+               #sound-dai-cells = <1>;
+       };
 };
 
 &apps_rsc {
@@ -536,6 +561,22 @@
        firmware-name = "qcom/qcm6490/a660_zap.mbn";
 };
 
+&lpass_rx_macro {
+       status = "okay";
+};
+
+&lpass_tx_macro {
+       status = "okay";
+};
+
+&lpass_va_macro {
+       status = "okay";
+};
+
+&lpass_wsa_macro {
+       status = "okay";
+};
+
 &mdss {
        status = "okay";
 };
@@ -716,6 +757,81 @@
        cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
 };
 
+&swr0 {
+       status = "okay";
+
+       wcd937x_rx: codec@0,4 {
+               compatible = "sdw20217010a00";
+               reg = <0 4>;
+
+               /*
+                * WCD9370 RX Port 1 (HPH_L/R)       <==>    SWR1 Port 1 (HPH_L/R)
+                * WCD9370 RX Port 2 (CLSH)          <==>    SWR1 Port 2 (CLSH)
+                * WCD9370 RX Port 3 (COMP_L/R)      <==>    SWR1 Port 3 (COMP_L/R)
+                * WCD9370 RX Port 4 (LO)            <==>    SWR1 Port 4 (LO)
+                * WCD9370 RX Port 5 (DSD_L/R)       <==>    SWR1 Port 5 (DSD)
+                */
+               qcom,rx-port-mapping = <1 2 3 4 5>;
+
+               /*
+                * Static channels mapping between slave and master rx port channels.
+                * In the order of slave port channels, which is
+                * hph_l, hph_r, clsh, comp_l, comp_r, lo, dsd_r, dsd_l.
+                */
+               qcom,rx-channel-mapping = /bits/ 8 <1 2 1 1 2 1 1 2>;
+       };
+};
+
+&swr1 {
+       status = "okay";
+
+       wcd937x_tx: codec@0,3 {
+               compatible = "sdw20217010a00";
+               reg = <0 3>;
+
+               /*
+                * WCD9370 TX Port 1 (ADC1)               <=> SWR2 Port 2
+                * WCD9370 TX Port 2 (ADC2, 3)            <=> SWR2 Port 2
+                * WCD9370 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3
+                * WCD9370 TX Port 4 (DMIC4,5,6,7)        <=> SWR2 Port 4
+                */
+               qcom,tx-port-mapping = <1 1 2 3>;
+
+               /*
+                * Static channel mapping between slave and master tx port channels.
+                * In the order of slave port channels which is adc1, adc2, adc3,
+                * mic0, dmic1, mbhc, dmic2, dmic3, dmci4, dmic5, dmic6, dmic7.
+                */
+               qcom,tx-channel-mapping = /bits/ 8 <1 2 1 1 2 3 3 4 1 2 3 4>;
+       };
+};
+
+&swr2 {
+       status = "okay";
+
+       left_spkr: speaker@0,1 {
+               compatible = "sdw10217020200";
+               reg = <0 1>;
+               powerdown-gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+               #sound-dai-cells = <0>;
+               sound-name-prefix = "SpkrLeft";
+               #thermal-sensor-cells = <0>;
+               vdd-supply = <&vreg_l18b_1p8>;
+               qcom,port-mapping = <1 2 3 7>;
+       };
+
+       right_spkr: speaker@0,2 {
+               compatible = "sdw10217020200";
+               reg = <0 2>;
+               powerdown-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
+               #sound-dai-cells = <0>;
+               sound-name-prefix = "SpkrRight";
+               #thermal-sensor-cells = <0>;
+               vdd-supply = <&vreg_l18b_1p8>;
+               qcom,port-mapping = <4 5 6 8>;
+       };
+};
+
 &tlmm {
        gpio-reserved-ranges = <32 2>, /* ADSP */
                               <48 4>; /* NFC */
@@ -725,6 +841,13 @@
                function = "gpio";
                bias-pull-up;
        };
+
+       wcd_default: wcd-reset-n-active-state {
+               pins = "gpio83";
+               function = "gpio";
+               drive-strength = <16>;
+               bias-disable;
+       };
 };
 
 &uart5 {

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 5b78d111b2f2f4e91404d477d3cdffcda0623b1f..4ac909214a8690111b2596d36a8e6e79d0f05131 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3029,21 +3029,33 @@
                        lpass_rx_swr_clk: rx-swr-clk-state {
                                pins = "gpio3";
                                function = "swr_rx_clk";
+                               drive-strength = <2>;
+                               slew-rate = <1>;
+                               bias-disable;
                        };
 
                        lpass_rx_swr_data: rx-swr-data-state {
                                pins = "gpio4", "gpio5";
                                function = "swr_rx_data";
+                               drive-strength = <2>;
+                               slew-rate = <1>;
+                               bias-bus-hold;
                        };
 
                        lpass_tx_swr_clk: tx-swr-clk-state {
                                pins = "gpio0";
                                function = "swr_tx_clk";
+                               drive-strength = <2>;
+                               slew-rate = <1>;
+                               bias-disable;
                        };
 
                        lpass_tx_swr_data: tx-swr-data-state {
                                pins = "gpio1", "gpio2", "gpio14";
                                function = "swr_tx_data";
+                               drive-strength = <2>;
+                               slew-rate = <1>;
+                               bias-bus-hold;
                        };
 
                        lpass_wsa_swr_clk: wsa-swr-clk-state {