]> git.ipfire.org Git - thirdparty/bind9.git/commitdiff
3454. [port] sparc64: improve atomic support. [RT #25182]
authorMark Andrews <marka@isc.org>
Wed, 9 Jan 2013 01:55:32 +0000 (12:55 +1100)
committerMark Andrews <marka@isc.org>
Wed, 9 Jan 2013 01:55:32 +0000 (12:55 +1100)
CHANGES
lib/isc/sparc64/include/isc/atomic.h

diff --git a/CHANGES b/CHANGES
index 3ddca1860994d2880f7239f545a25455a1d739e1..2d70584746f7b92bde10bc1b68c2d005816c66c9 100644 (file)
--- a/CHANGES
+++ b/CHANGES
@@ -1,3 +1,5 @@
+3454.  [port]          sparc64: improve atomic support. [RT #25182]
+
 3453.  [bug]           'rndc addzone' of a zone with 'inline-signing yes;'
                        failed. [RT #31960]
 
index 5533ddb0cc6fa79f819bc7175c20f0280b342f61..e323e05ce1b264fd2c39558ffe58c7785754bfc3 100644 (file)
@@ -72,9 +72,9 @@ isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
        for (prev = *(volatile isc_int32_t *)p; ; prev = swapped) {
                swapped = prev + val;
                __asm__ volatile(
-                       "casa [%1] %2, %3, %0"
-                       : "+r"(swapped)
-                       : "r"(p), "n"(ASI_P), "r"(prev));
+                       "casa [%2] %3, %4, %0"
+                       : "+r"(swapped), "=m"(*p)
+                       : "r"(p), "n"(ASI_P), "r"(prev), "m"(*p));
                if (swapped == prev)
                        break;
        }
@@ -92,10 +92,9 @@ isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
        for (prev = *(volatile isc_int32_t *)p; ; prev = swapped) {
                swapped = val;
                __asm__ volatile(
-                       "casa [%1] %2, %3, %0"
-                       : "+r"(swapped)
-                       : "r"(p), "n"(ASI_P), "r"(prev)
-                       : "memory");
+                       "casa [%2] %3, %4, %0"
+                       : "+r"(swapped), "=m"(*p)
+                       : "r"(p), "n"(ASI_P), "r"(prev), "m"(*p));
                if (swapped == prev)
                        break;
        }
@@ -111,9 +110,9 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
        isc_int32_t temp = val;
 
        __asm__ volatile(
-               "casa [%1] %2, %3, %0"
-               : "+r"(temp)
-               : "r"(p), "n"(ASI_P), "r"(cmpval));
+               "casa [%2] %3, %4, %0"
+               : "+r"(temp), "=m"(*p)
+               : "r"(p), "n"(ASI_P), "r"(cmpval), "m"(*p));
 
        return (temp);
 }