comedi: pcl818: Add sanity checks for I/O base address

The "pcl818" driver uses an admin-supplied configuration option
(`it->options[0]`) to configure the I/O port base address of a board in
the PCL-818 series.  It currently allows any base address to be
configured but the hardware devices only support base addresses
(configured by on-board DIP switches) from 0 to 0x3F0 on 16-byte
boundaries.  If the board has a FIFO and jumper JP6 is in the "Enabled"
(default) position, then the base address needs to be on a 32-byte
boundary and the length of the I/O port region will be 32 (to allow
access to the FIFO registers) instead of 16.  The state of jumper JP6 is
unknown, so if the board has a FIFO device and is being configured on an
odd 16-byte boundary, assume that jumper JP6 is in the "Disabled"
position (to disallow access to the FIFO registers).

Add a sanity check to ensure the device is not configured at an
unsupported base address.

If the board has a FIFO and is configured on an odd 16-byte boundary,
log a reminder that JP6 needs to be in the "Disabled" position for
correct operation.  If the board has a FIFO and is configured on an even
16-byte boundary and the configuration option has been set to use the
FIFO (`it->options[2] == -1`), log a reminder that JP6 needs to be in
the "Enabled" position.

Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Link: https://patch.msgid.link/20260130170416.49994-39-abbotti@mev.co.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/comedi/drivers/pcl818.c b/drivers/comedi/drivers/pcl818.c
index 06fe06396f23abb08750eefc6bc20380f9411b4f..aa775a024fc7f2ced7cc5fcf82fe251785bd75fc 100644 (file)
--- a/drivers/comedi/drivers/pcl818.c
+++ b/drivers/comedi/drivers/pcl818.c
@@ -981,6 +981,10 @@ static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it)
        const struct pcl818_board *board = dev->board_ptr;
        struct pcl818_private *devpriv;
        struct comedi_subdevice *s;
+       unsigned int io_base = it->options[0];
+       bool fifo_is_supported = board->has_fifo && !(io_base & 0x10);
+       bool fifo_is_wanted = board->has_fifo && it->options[2] == -1;
+       unsigned int io_len = fifo_is_supported ? 0x20 : 0x10;
        unsigned int osc_base;
        int ret;
 
@@ -988,11 +992,28 @@ static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it)
        if (!devpriv)
                return -ENOMEM;
 
-       ret = comedi_request_region(dev, it->options[0],
-                                   board->has_fifo ? 0x20 : 0x10);
+       ret = comedi_check_request_region(dev, io_base, io_len,
+                                         0, 0x3ff, io_len);
        if (ret)
                return ret;
 
+       if (board->has_fifo) {
+               /* let user know about any required JP6 setting */
+               if (fifo_is_supported) {
+                       if (fifo_is_wanted) {
+                               dev_info(dev->class_dev,
+                                        "Assuming JP6 is in \"Enabled\" (default) position to use the FIFO.\n");
+                       }
+               } else {
+                       dev_info(dev->class_dev,
+                                "JP6 needs to be in \"Disabled\" position for correct operation at this base address\n");
+                       if (fifo_is_wanted) {
+                               dev_warn(dev->class_dev,
+                                        "FIFO cannot be used at this base address\n");
+                       }
+               }
+       }
+
        /* we can use IRQ 2-7 for async command support */
        if (it->options[1] >= 2 && it->options[1] <= 7) {
                ret = request_irq(it->options[1], pcl818_interrupt, 0,
@@ -1002,7 +1023,7 @@ static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it)
        }
 
        /* should we use the FIFO? */
-       if (dev->irq && board->has_fifo && it->options[2] == -1)
+       if (dev->irq && fifo_is_supported && fifo_is_wanted)
                devpriv->usefifo = 1;
 
        /* we need an IRQ to do DMA on channel 3 or 1 */