drm/i915/dg2: DG2 uses the same sseu limits as XeHP SDV

DG2 supports compute DSS and has the same maximum number of DSS and EU
as XeHP SDV.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210729170008.2836648-12-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c
index 3a2ff0e00b657eea97da290b8b2ccdf940cfbd79..a648818eafa523e5bbbc92131623241833e0b571 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_sseu.c
+++ b/drivers/gpu/drm/i915/gt/intel_sseu.c
@@ -145,7 +145,7 @@ static void gen12_sseu_info_init(struct intel_gt *gt)
         * across the entire device. Then calculate out the DSS for each
         * workload type within that software slice.
         */
-       if (IS_XEHPSDV(gt->i915))
+       if (IS_DG2(gt->i915) || IS_XEHPSDV(gt->i915))
                intel_sseu_set_info(sseu, 1, 32, 16);
        else
                intel_sseu_set_info(sseu, 1, 6, 16);