]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
realtek: add support for Hasivo S1300WP-8XGT-4S+ 23775/head
authorCarlo Szelinsky <github@szelinsky.de>
Sat, 13 Jun 2026 15:04:25 +0000 (17:04 +0200)
committerJonas Jelonek <jelonek.jonas@gmail.com>
Mon, 6 Jul 2026 20:40:14 +0000 (22:40 +0200)
The Hasivo S1300WP-8XGT-4S+ is a 12-port managed switch based on the
Realtek RTL9313 (RTL931x) SoC.

Tested on hardware revision v1.02 (manufactured 2026-04).

Specifications:
- SoC: Realtek RTL9313
- RAM: 512 MB
- Flash: 32 MB SPI-NOR
- Ethernet: 8x 10GBASE-T (2x RTL8264 quad PHYs), 4x SFP+ (10G)
- Button: 1x reset
- LEDs: 1x system (green) + per-port link/activity via the SoC LED engine
- RTC: NXP PCF8563
- Management MCU (I2C 0x6F): watchdog, CPU/system temperature and fan
  control (hwmon)
- UART: 38400 8N1 on the internal header

Working: switching on all copper and SFP+ ports, per-port and system
LEDs, reset button, RTC, watchdog, temperature/fan monitoring.

Not supported: PoE (the PD69x0x PSE controllers are on the PCB but not
driven), front-panel USB host.

Installation:
Netboot the initramfs image over TFTP, then run sysupgrade from OpenWrt.
Connect to the serial console (38400 8N1) and interrupt the U-Boot
autoboot to reach the prompt (press Ctrl+C, then z, then h), then boot
the initramfs image from a TFTP server:

  RTL9310# setenv boardmodel RTL9313_12XGE
  RTL9310# rtk network on
  RTL9310# rtk 10g 55 fiber1g
  RTL9310# tftpboot 0x84f00000 openwrt-...-initramfs-kernel.bin
  RTL9310# bootm 0x84f00000

Port 55 is front-panel port 12. Use fiber1g for a 1G SFP, fiber10g for
SFP+, and dac50cm for an SFP/RJ45 module. Once OpenWrt has booted, copy
the sysupgrade image over and flash it with sysupgrade.

MAC addresses:
  The base MAC comes from the U-Boot environment variable "ethaddr" in
  the u-boot-env partition (stock BDINFO). These units ship unprovisioned
  (ethaddr = 00:E0:4C:00:00:00); in that case a random MAC is generated
  and persisted. Per-port LAN MACs are derived sequentially.

    eth0 / label    u-boot-env "ethaddr" (random fallback when unset)
    lan1 .. lan12   base MAC + sequential offset

Signed-off-by: Carlo Szelinsky <github@szelinsky.de>
Link: https://github.com/openwrt/openwrt/pull/23775
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
target/linux/realtek/base-files/etc/board.d/02_network
target/linux/realtek/base-files/etc/uci-defaults/99_fwenv-store-ethaddr
target/linux/realtek/dts/rtl9313_hasivo_s1300wp-8xgt-4s-plus.dts [new file with mode: 0644]
target/linux/realtek/image/rtl931x.mk

index c7a23d41cc61a3702046d81379b07d41653696cc..899f3f117d6e15b77ec00aedc48531db4a111ae5 100644 (file)
@@ -102,6 +102,7 @@ realtek_setup_macs()
        hasivo,f1100w-4sx-4xgt|\
        hasivo,f1100w-4sx-4xgt-512mb|\
        hasivo,f5800w-12s-plus|\
+       hasivo,s1300wp-8xgt-4s-plus|\
        tplink,tl-st1008f-v2|\
        zyxel,xgs1010-12-a1|\
        zyxel,xgs1010-12-b1)
index 5a8e3a8ae1bd287d0d3d9224e072386e4ba49d92..53fb5607d10f84b599d652090f6e52524881125d 100644 (file)
@@ -44,6 +44,7 @@ case "$(board_name)" in
 hasivo,f1100w-4sx-4xgt|\
 hasivo,f1100w-4sx-4xgt-512mb|\
 hasivo,f5800w-12s-plus|\
+hasivo,s1300wp-8xgt-4s-plus|\
 tplink,tl-st1008f-v2)
        env_ethaddr=$(macaddr_canonicalize "$(fw_printenv -n ethaddr 2>/dev/null)")
        ethaddr_prefix=$(echo "$env_ethaddr" | cut -d: -f1-5)
diff --git a/target/linux/realtek/dts/rtl9313_hasivo_s1300wp-8xgt-4s-plus.dts b/target/linux/realtek/dts/rtl9313_hasivo_s1300wp-8xgt-4s-plus.dts
new file mode 100644 (file)
index 0000000..8f6cdf4
--- /dev/null
@@ -0,0 +1,320 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl931x.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/phy/phy.h>
+
+/ {
+       compatible = "hasivo,s1300wp-8xgt-4s-plus", "realtek,rtl9313-soc";
+       model = "Hasivo S1300WP-8XGT-4S+";
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x00000000 0x10000000>,
+                     <0x90000000 0x10000000>;
+       };
+
+       aliases {
+               label-mac-device = &ethernet0;
+               led-boot = &led_sys;
+               led-failsafe = &led_sys;
+               led-running = &led_sys;
+               led-upgrade = &led_sys;
+       };
+
+       chosen {
+               stdout-path = "serial0:38400n8";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               button-reset {
+                       label = "reset";
+                       gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+       };
+
+       sfp9: sfp-p9 {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c1_sda8>;
+               los-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+               #thermal-sensor-cells = <0>;
+       };
+
+       sfp10: sfp-p10 {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c1_sda6>;
+               los-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+               #thermal-sensor-cells = <0>;
+       };
+
+       sfp11: sfp-p11 {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c1_sda0>;
+               los-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+               #thermal-sensor-cells = <0>;
+       };
+
+       sfp12: sfp-p12 {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c1_sda1>;
+               los-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+               #thermal-sensor-cells = <0>;
+       };
+
+       i2c_sys: i2c-system {
+               compatible = "i2c-gpio";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinmux_disable_jtag>;
+
+               scl-gpios = <&gpio0 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               sda-gpios = <&gpio0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               i2c-gpio,delay-us = <28>;
+
+               rtc@51 {
+                       compatible = "nxp,pcf8563";
+                       reg = <0x51>;
+               };
+
+               mcu_mgmt: mcu@6f {
+                       compatible = "hasivo,stc8-mfd", "syscon";
+                       reg = <0x6f>;
+
+                       mcu_wdt: watchdog {
+                               compatible = "hasivo,mcu-wdt";
+                       };
+
+                       sensor {
+                               compatible = "hasivo,mcu-sensor";
+                       };
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led_sys: led-0 {
+                       gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_STATUS;
+               };
+       };
+
+       led_set {
+               compatible = "realtek,rtl9300-leds";
+               active-low;
+
+               led_set0 = <(RTL93XX_LED_SET_10G | RTL93XX_LED_SET_LINK |
+                            RTL93XX_LED_SET_ACT)
+                           (RTL93XX_LED_SET_5G | RTL93XX_LED_SET_2P5G |
+                            RTL93XX_LED_SET_LINK | RTL93XX_LED_SET_ACT)
+                           (RTL93XX_LED_SET_1G | RTL93XX_LED_SET_100M |
+                            RTL93XX_LED_SET_10M | RTL93XX_LED_SET_LINK |
+                            RTL93XX_LED_SET_ACT)>;
+       };
+};
+
+&i2c_mst1 {
+       status = "okay";
+
+       i2c1_sda0: i2c@0 { reg = <0>; };
+       i2c1_sda1: i2c@1 { reg = <1>; };
+       i2c1_sda6: i2c@6 { reg = <6>; };
+       i2c1_sda8: i2c@8 { reg = <8>; };
+};
+
+&spi0 {
+       status = "okay";
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <10000000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "u-boot";
+                               reg = <0x000000 0x0e0000>;
+                               read-only;
+                       };
+
+                       /* stock layout calls this BDINFO; it holds the U-Boot environment */
+                       partition@e0000 {
+                               label = "u-boot-env";
+                               reg = <0x0e0000 0x010000>;
+                               read-only;
+                       };
+
+                       /* stock layout calls this SYSINFO */
+                       partition@f0000 {
+                               label = "u-boot-env2";
+                               reg = <0x0f0000 0x010000>;
+                               read-only;
+                       };
+
+                       partition@100000 {
+                               label = "cfg";
+                               reg = <0x100000 0x100000>;
+                       };
+
+                       partition@200000 {
+                               label = "log";
+                               reg = <0x200000 0x100000>;
+                       };
+
+                       partition@300000 {
+                               compatible = "openwrt,uimage", "denx,uimage";
+                               label = "firmware";
+                               reg = <0x300000 0x1d00000>;
+                       };
+               };
+       };
+};
+
+&mdio_ctrl {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinmux_enable_mdc_mdio_0>,
+                   <&pinmux_enable_mdc_mdio_1>;
+};
+
+&mdio_bus0 {
+       /* RTL8264 quad-PHY package */
+       ethernet-phy-package@0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0>;
+
+               PHY_C45(0,  0)
+               PHY_C45(8,  1)
+               PHY_C45(16, 2)
+               PHY_C45(24, 3)
+       };
+};
+
+&mdio_bus1 {
+       /* RTL8264 quad-PHY package */
+       ethernet-phy-package@4 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <4>;
+
+               PHY_C45(32, 4)
+               PHY_C45(40, 5)
+               PHY_C45(48, 6)
+               PHY_C45(50, 7)
+       };
+};
+
+&phy0 {
+       tx-polarity = <PHY_POL_INVERT>;
+       realtek,enable-pma-low-power;
+};
+
+&phy8 {
+       tx-polarity = <PHY_POL_INVERT>;
+       rx-polarity = <PHY_POL_INVERT>;
+       realtek,enable-pma-low-power;
+};
+
+&phy16 {
+       tx-polarity = <PHY_POL_INVERT>;
+       realtek,enable-pma-low-power;
+};
+
+&phy24 {
+       tx-polarity = <PHY_POL_INVERT>;
+       rx-polarity = <PHY_POL_INVERT>;
+       realtek,enable-pma-low-power;
+};
+
+&phy32 {
+       tx-polarity = <PHY_POL_INVERT>;
+       realtek,enable-pma-low-power;
+};
+
+&phy40 {
+       tx-polarity = <PHY_POL_INVERT>;
+       rx-polarity = <PHY_POL_INVERT>;
+       realtek,enable-pma-low-power;
+};
+
+&phy48 {
+       tx-polarity = <PHY_POL_INVERT>;
+       realtek,enable-pma-low-power;
+};
+
+&phy50 {
+       tx-polarity = <PHY_POL_INVERT>;
+       rx-polarity = <PHY_POL_INVERT>;
+       realtek,enable-pma-low-power;
+};
+
+&switch0 {
+       ethernet-ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               SWITCH_PORT_LED(0,  1, 2, 0, 0, usxgmii)
+               SWITCH_PORT_LED(8,  2, 3, 0, 0, usxgmii)
+               SWITCH_PORT_LED(16, 3, 4, 0, 0, usxgmii)
+               SWITCH_PORT_LED(24, 4, 5, 0, 0, usxgmii)
+               SWITCH_PORT_LED(32, 5, 6, 0, 0, usxgmii)
+               SWITCH_PORT_LED(40, 6, 7, 0, 0, usxgmii)
+               SWITCH_PORT_LED(48, 7, 8, 0, 0, usxgmii)
+               SWITCH_PORT_LED(50, 8, 9, 0, 0, usxgmii)
+
+               SWITCH_PORT_SFP(52, 9,  10, 0, 9)
+               SWITCH_PORT_SFP(53, 10, 11, 0, 10)
+               SWITCH_PORT_SFP(54, 11, 12, 0, 11)
+               SWITCH_PORT_SFP(55, 12, 13, 0, 12)
+
+               port@56 {
+                       ethernet = <&ethernet0>;
+                       reg = <56>;
+                       phy-mode = "internal";
+
+                       fixed-link {
+                               speed = <1000>;
+                               full-duplex;
+                       };
+               };
+       };
+};
+
+&serdes2 { rx-polarity = <PHY_POL_INVERT>; };
+&serdes3 {
+       tx-polarity = <PHY_POL_INVERT>;
+       rx-polarity = <PHY_POL_INVERT>;
+};
+&serdes4 { rx-polarity = <PHY_POL_INVERT>; };
+&serdes5 {
+       tx-polarity = <PHY_POL_INVERT>;
+       rx-polarity = <PHY_POL_INVERT>;
+};
+&serdes6 { rx-polarity = <PHY_POL_INVERT>; };
+&serdes7 {
+       tx-polarity = <PHY_POL_INVERT>;
+       rx-polarity = <PHY_POL_INVERT>;
+};
+&serdes8 { rx-polarity = <PHY_POL_INVERT>; };
+&serdes9 {
+       tx-polarity = <PHY_POL_INVERT>;
+       rx-polarity = <PHY_POL_INVERT>;
+};
+
+&serdes10 { tx-polarity = <PHY_POL_INVERT>; };
+&serdes11 { tx-polarity = <PHY_POL_INVERT>; };
+&serdes12 { tx-polarity = <PHY_POL_INVERT>; };
+&serdes13 { tx-polarity = <PHY_POL_INVERT>; };
index 3afa83035639b76ad4eade8fecfe7e6f18ccd149..076d91a24a8448d098025bfa44c72578cb782017 100644 (file)
@@ -12,6 +12,17 @@ define Device/hasivo_f5800w-12s-plus
 endef
 TARGET_DEVICES += hasivo_f5800w-12s-plus
 
+define Device/hasivo_s1300wp-8xgt-4s-plus
+  SOC := rtl9313
+  DEVICE_VENDOR := Hasivo
+  DEVICE_MODEL := S1300WP-8XGT-4S+
+  IMAGE_SIZE := 29696k
+  DEVICE_PACKAGES := kmod-phy-realtek kmod-rtc-pcf8563 rtl826x-firmware \
+                    kmod-hasivo-mcu-wdt kmod-hasivo-mcu-sensor
+  $(Device/kernel-lzma)
+endef
+TARGET_DEVICES += hasivo_s1300wp-8xgt-4s-plus
+
 define Device/plasmacloud-common
   SOC := rtl9312
   UIMAGE_MAGIC := 0x93100000