irqchip/gic-v5: Immediately exec priority drop following activate

With GICv5 an interrupt of equal or lower priority cannot be signalled
until there has been a priority drop. This is done via the GIC CDEOI
system instruction. Once this has been executed, the hardware is able
to signal the next interrupt if there is one.

As all interrupts are programmed to have the same priority, no new
interrupts can be signalled until the priority drop has happened. This
can cause issues when, for example, an interrupt remains active while
a long running process takes place, such as when injecting a physical
interrupt into a guest VM in software.

The GICv5 driver has so far done the priority drop as part of
irq_eoi(), i.e., at the same time as deactivating the interrupt. This
means that any long running process (or VM) could block incoming
interrupts, effectively causing a denial of service for all other
interrupts.

Rather than doing the EOI as part of irq_eoi() (which the name would
suggest would be a good place for it), move it to happen immediately
after acknowledging an interrupt in the main GICv5 interrupt
handler. The deactivation of interrupts (GIC CDDI) remains implemented
as part of irq_eoi(), which means that the same interrupt cannot be
signalled a second time until deactivated by software.

Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Link: https://lore.kernel.org/r/20260520091949.542365-18-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/drivers/irqchip/irq-gic-v5.c b/drivers/irqchip/irq-gic-v5.c
index 6b0903be8ebfd3a05460410e813807623876c6d3..58e457d4c147638a4e8a857661668cee5d6f857c 100644 (file)
--- a/drivers/irqchip/irq-gic-v5.c
+++ b/drivers/irqchip/irq-gic-v5.c
@@ -218,17 +218,13 @@ static void gicv5_hwirq_eoi(u32 hwirq_id, u8 hwirq_type)
               FIELD_PREP(GICV5_GIC_CDDI_TYPE_MASK, hwirq_type);
 
        gic_insn(cddi, CDDI);
-
-       gic_insn(0, CDEOI);
 }
 
 static void gicv5_ppi_irq_eoi(struct irq_data *d)
 {
        /* Skip deactivate for forwarded PPI interrupts */
-       if (irqd_is_forwarded_to_vcpu(d)) {
-               gic_insn(0, CDEOI);
+       if (irqd_is_forwarded_to_vcpu(d))
                return;
-       }
 
        gicv5_hwirq_eoi(d->hwirq, GICV5_HWIRQ_TYPE_PPI);
 }
@@ -963,6 +959,13 @@ static void __exception_irq_entry gicv5_handle_irq(struct pt_regs *regs)
         */
        isb();
 
+       /*
+        * Ensure that we can receive the next interrupts in the event that we
+        * have a long running handler or directly enter a guest by doing the
+        * priority drop immediately.
+        */
+       gic_insn(0, CDEOI);
+
        hwirq = FIELD_GET(GICV5_HWIRQ_INTID, ia);
 
        handle_irq_per_domain(hwirq);