ARM: dts: tqma7: add boot phase properties

dtschema/schemas/bootph.yaml describe various node usage during
boot phases with DT.

Adds boot phase properties to essential resources in
tqma7 device trees. This includes UART, SD-Card, eMMC and QSPI.

Signed-off-by: Alexander Feilke <Alexander.Feilke@ew.tq-group.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi
index 4d948a9757f9f912895be4b5dbe72ee8ca4736d3..03f2f2cbdfbc5b6170db93bdf00e6ec768a440af 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi
@@ -477,6 +477,7 @@
        };
 
        pinctrl_uart6: uart6grp {
+               bootph-pre-ram;
                fsl,pins =
                        <MX7D_PAD_EPDC_DATA08__UART6_DCE_RX     0x7d>,
                        <MX7D_PAD_EPDC_DATA09__UART6_DCE_TX     0x75>,
@@ -511,6 +512,7 @@
                        <MX7D_PAD_SD1_DATA1__SD1_DATA1          0x5e>,
                        <MX7D_PAD_SD1_DATA2__SD1_DATA2          0x5e>,
                        <MX7D_PAD_SD1_DATA3__SD1_DATA3          0x5e>;
+               bootph-pre-ram;
        };
 
        pinctrl_usdhc1_100mhz: usdhc1_100mhzgrp {
@@ -602,6 +604,7 @@
        pinctrl-0 = <&pinctrl_uart6>;
        assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
        assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
+       bootph-pre-ram;
        status = "okay";
 };
 
@@ -646,6 +649,7 @@
        no-1-8-v;
        no-sdio;
        no-mmc;
+       bootph-pre-ram;
        status = "okay";
 };
 

diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi
index 2966a33bc528a9968fc30c1d71fa93d3592e88da..f3d7a2d0cb7b825abe1020bb9fcc826790edb27a 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi
@@ -193,6 +193,7 @@
                        <MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK      0x11>,
                        <MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B     0x54>,
                        <MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B     0x54>;
+               bootph-pre-ram;
        };
 
        pinctrl_qspi_reset: qspi_resetgrp {
@@ -214,6 +215,7 @@
                        <MX7D_PAD_SD3_DATA6__SD3_DATA6          0x59>,
                        <MX7D_PAD_SD3_DATA7__SD3_DATA7          0x59>,
                        <MX7D_PAD_SD3_STROBE__SD3_STROBE        0x19>;
+               bootph-pre-ram;
        };
 
        pinctrl_usdhc3_100mhz: usdhc3_100mhzgrp {
@@ -257,6 +259,7 @@
 &qspi {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_qspi &pinctrl_qspi_reset>;
+       bootph-pre-ram;
        status = "okay";
 
        flash0: flash@0 {
@@ -266,6 +269,7 @@
                spi-rx-bus-width = <4>;
                spi-tx-bus-width = <4>;
                vcc-supply = <&vgen4_reg>;
+               bootph-pre-ram;
 
                partitions {
                        compatible = "fixed-partitions";
@@ -288,6 +292,7 @@
        no-sdio;
        vmmc-supply = <&vgen4_reg>;
        vqmmc-supply = <&sw2_reg>;
+       bootph-pre-ram;
        status = "okay";
 };