+2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/arm/cortex-a15.md (cortex_a15_alu_shift): Add crc type
+ to reservation.
+ * config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.
+
2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.md (clzsi2): Set predicable_short_it attr to no.
"ca15_issue1,(ca15_sx1,ca15_sx1_alu)|(ca15_sx2,ca15_sx2_alu)")
;; ALU ops with immediate shift
+;; crc is also included here so that appropriate scheduling of CRC32 ARMv8-A
+;; instructions can be performed when tuning for the Cortex-A57 since that
+;; core reuses the Cortex-A15 pipeline description for the moment.
(define_insn_reservation "cortex_a15_alu_shift" 3
(and (eq_attr "tune" "cortexa15")
(eq_attr "type" "extend,\
alu_shift_imm,alus_shift_imm,\
- logic_shift_imm,logics_shift_imm,\
+ crc,logic_shift_imm,logics_shift_imm,\
mov_shift,mvn_shift"))
"ca15_issue1,(ca15_sx1,ca15_sx1+ca15_sx1_shf,ca15_sx1_alu)\
|(ca15_sx2,ca15_sx2+ca15_sx2_shf,ca15_sx2_alu)")
(define_insn_reservation "cortex_a53_alu_shift" 2
(and (eq_attr "tune" "cortexa53")
(eq_attr "type" "alu_shift_imm,alus_shift_imm,\
- logic_shift_imm,logics_shift_imm,\
+ crc,logic_shift_imm,logics_shift_imm,\
alu_shift_reg,alus_shift_reg,\
logic_shift_reg,logics_shift_reg,\
extend,mov_shift,mov_shift_reg,\