--- /dev/null
+From a5406a7ff56e63376c210b06072aa0ef23473366 Mon Sep 17 00:00:00 2001
+From: Kefeng Wang <wangkefeng.wang@huawei.com>
+Date: Mon, 15 Mar 2021 20:03:07 +0800
+Subject: riscv: Correct SPARSEMEM configuration
+
+From: Kefeng Wang <wangkefeng.wang@huawei.com>
+
+commit a5406a7ff56e63376c210b06072aa0ef23473366 upstream.
+
+There are two issues for RV32,
+1) if use FLATMEM, it is useless to enable SPARSEMEM_STATIC.
+2) if use SPARSMEM, both SPARSEMEM_VMEMMAP and SPARSEMEM_STATIC is enabled.
+
+Fixes: d95f1a542c3d ("RISC-V: Implement sparsemem")
+Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/riscv/Kconfig | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/riscv/Kconfig
++++ b/arch/riscv/Kconfig
+@@ -58,7 +58,6 @@ config RISCV
+ select EDAC_SUPPORT
+ select ARCH_HAS_GIGANTIC_PAGE
+ select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
+- select SPARSEMEM_STATIC if 32BIT
+ select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
+ select HAVE_ARCH_MMAP_RND_BITS
+ select HAVE_COPY_THREAD_TLS
+@@ -102,7 +101,8 @@ config ARCH_FLATMEM_ENABLE
+ config ARCH_SPARSEMEM_ENABLE
+ def_bool y
+ depends on MMU
+- select SPARSEMEM_VMEMMAP_ENABLE
++ select SPARSEMEM_STATIC if 32BIT && SPARSMEM
++ select SPARSEMEM_VMEMMAP_ENABLE if 64BIT
+
+ config ARCH_SELECT_MEMORY_MODEL
+ def_bool ARCH_SPARSEMEM_ENABLE