--- /dev/null
+From f630c1bdfbf8fe423325beaf60027cfc7fd7c610 Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Thu, 15 Sep 2011 11:45:15 +0100
+Subject: ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed
+
+From: Will Deacon <will.deacon@arm.com>
+
+commit f630c1bdfbf8fe423325beaf60027cfc7fd7c610 upstream.
+
+This patch implements a workaround for erratum 764369 affecting
+Cortex-A9 MPCore with two or more processors (all current revisions).
+Under certain timing circumstances, a data cache line maintenance
+operation by MVA targeting an Inner Shareable memory region may fail to
+proceed up to either the Point of Coherency or to the Point of
+Unification of the system. This workaround adds a DSB instruction before
+the relevant cache maintenance functions and sets a specific bit in the
+diagnostic control register of the SCU.
+
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
+Tested-by: Mark Rutland <mark.rutland@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/arm/Kconfig | 14 ++++++++++++++
+ arch/arm/kernel/smp_scu.c | 10 ++++++++++
+ arch/arm/mm/cache-v7.S | 20 ++++++++++++++++++++
+ 3 files changed, 44 insertions(+)
+
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -1298,6 +1298,20 @@ source "drivers/pci/Kconfig"
+
+ source "drivers/pcmcia/Kconfig"
+
++config ARM_ERRATA_764369
++ bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
++ depends on CPU_V7 && SMP
++ help
++ This option enables the workaround for erratum 764369
++ affecting Cortex-A9 MPCore with two or more processors (all
++ current revisions). Under certain timing circumstances, a data
++ cache line maintenance operation by MVA targeting an Inner
++ Shareable memory region may fail to proceed up to either the
++ Point of Coherency or to the Point of Unification of the
++ system. This workaround adds a DSB instruction before the
++ relevant cache maintenance functions and sets a specific bit
++ in the diagnostic control register of the SCU.
++
+ endmenu
+
+ menu "Kernel Features"
+--- a/arch/arm/kernel/smp_scu.c
++++ b/arch/arm/kernel/smp_scu.c
+@@ -13,6 +13,7 @@
+
+ #include <asm/smp_scu.h>
+ #include <asm/cacheflush.h>
++#include <asm/cputype.h>
+
+ #define SCU_CTRL 0x00
+ #define SCU_CONFIG 0x04
+@@ -36,6 +37,15 @@ void __init scu_enable(void __iomem *scu
+ {
+ u32 scu_ctrl;
+
++#ifdef CONFIG_ARM_ERRATA_764369
++ /* Cortex-A9 only */
++ if ((read_cpuid(CPUID_ID) & 0xff0ffff0) == 0x410fc090) {
++ scu_ctrl = __raw_readl(scu_base + 0x30);
++ if (!(scu_ctrl & 1))
++ __raw_writel(scu_ctrl | 0x1, scu_base + 0x30);
++ }
++#endif
++
+ scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
+ /* already enabled? */
+ if (scu_ctrl & 1)
+--- a/arch/arm/mm/cache-v7.S
++++ b/arch/arm/mm/cache-v7.S
+@@ -174,6 +174,10 @@ ENTRY(v7_coherent_user_range)
+ dcache_line_size r2, r3
+ sub r3, r2, #1
+ bic r12, r0, r3
++#ifdef CONFIG_ARM_ERRATA_764369
++ ALT_SMP(W(dsb))
++ ALT_UP(W(nop))
++#endif
+ 1:
+ USER( mcr p15, 0, r12, c7, c11, 1 ) @ clean D line to the point of unification
+ add r12, r12, r2
+@@ -223,6 +227,10 @@ ENTRY(v7_flush_kern_dcache_area)
+ add r1, r0, r1
+ sub r3, r2, #1
+ bic r0, r0, r3
++#ifdef CONFIG_ARM_ERRATA_764369
++ ALT_SMP(W(dsb))
++ ALT_UP(W(nop))
++#endif
+ 1:
+ mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line / unified line
+ add r0, r0, r2
+@@ -247,6 +255,10 @@ v7_dma_inv_range:
+ sub r3, r2, #1
+ tst r0, r3
+ bic r0, r0, r3
++#ifdef CONFIG_ARM_ERRATA_764369
++ ALT_SMP(W(dsb))
++ ALT_UP(W(nop))
++#endif
+ mcrne p15, 0, r0, c7, c14, 1 @ clean & invalidate D / U line
+
+ tst r1, r3
+@@ -270,6 +282,10 @@ v7_dma_clean_range:
+ dcache_line_size r2, r3
+ sub r3, r2, #1
+ bic r0, r0, r3
++#ifdef CONFIG_ARM_ERRATA_764369
++ ALT_SMP(W(dsb))
++ ALT_UP(W(nop))
++#endif
+ 1:
+ mcr p15, 0, r0, c7, c10, 1 @ clean D / U line
+ add r0, r0, r2
+@@ -288,6 +304,10 @@ ENTRY(v7_dma_flush_range)
+ dcache_line_size r2, r3
+ sub r3, r2, #1
+ bic r0, r0, r3
++#ifdef CONFIG_ARM_ERRATA_764369
++ ALT_SMP(W(dsb))
++ ALT_UP(W(nop))
++#endif
+ 1:
+ mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D / U line
+ add r0, r0, r2
--- /dev/null
+From df77abcafc8dc881b6c9347548651777088e4b27 Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Fri, 23 Sep 2011 14:34:12 +0100
+Subject: ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_op
+
+From: Will Deacon <will.deacon@arm.com>
+
+commit df77abcafc8dc881b6c9347548651777088e4b27 upstream.
+
+The SMP implementation of __futex_atomic_op clobbers oldval with the
+status flag from the exclusive store. This causes it to always read as
+zero when performing the FUTEX_OP_CMP_* operation.
+
+This patch updates the ARM __futex_atomic_op implementations to take a
+tmp argument, allowing us to store the strex status flag without
+overwriting the register containing oldval.
+
+Reported-by: Minho Ban <mhban@samsung.com>
+Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/arm/include/asm/futex.h | 34 +++++++++++++++++-----------------
+ 1 file changed, 17 insertions(+), 17 deletions(-)
+
+--- a/arch/arm/include/asm/futex.h
++++ b/arch/arm/include/asm/futex.h
+@@ -25,17 +25,17 @@
+
+ #ifdef CONFIG_SMP
+
+-#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
++#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
+ smp_mb(); \
+ __asm__ __volatile__( \
+- "1: ldrex %1, [%2]\n" \
++ "1: ldrex %1, [%3]\n" \
+ " " insn "\n" \
+- "2: strex %1, %0, [%2]\n" \
+- " teq %1, #0\n" \
++ "2: strex %2, %0, [%3]\n" \
++ " teq %2, #0\n" \
+ " bne 1b\n" \
+ " mov %0, #0\n" \
+- __futex_atomic_ex_table("%4") \
+- : "=&r" (ret), "=&r" (oldval) \
++ __futex_atomic_ex_table("%5") \
++ : "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \
+ : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \
+ : "cc", "memory")
+
+@@ -73,14 +73,14 @@ futex_atomic_cmpxchg_inatomic(u32 *uval,
+ #include <linux/preempt.h>
+ #include <asm/domain.h>
+
+-#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
++#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
+ __asm__ __volatile__( \
+- "1: " T(ldr) " %1, [%2]\n" \
++ "1: " T(ldr) " %1, [%3]\n" \
+ " " insn "\n" \
+- "2: " T(str) " %0, [%2]\n" \
++ "2: " T(str) " %0, [%3]\n" \
+ " mov %0, #0\n" \
+- __futex_atomic_ex_table("%4") \
+- : "=&r" (ret), "=&r" (oldval) \
++ __futex_atomic_ex_table("%5") \
++ : "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \
+ : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \
+ : "cc", "memory")
+
+@@ -117,7 +117,7 @@ futex_atomic_op_inuser (int encoded_op,
+ int cmp = (encoded_op >> 24) & 15;
+ int oparg = (encoded_op << 8) >> 20;
+ int cmparg = (encoded_op << 20) >> 20;
+- int oldval = 0, ret;
++ int oldval = 0, ret, tmp;
+
+ if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
+ oparg = 1 << oparg;
+@@ -129,19 +129,19 @@ futex_atomic_op_inuser (int encoded_op,
+
+ switch (op) {
+ case FUTEX_OP_SET:
+- __futex_atomic_op("mov %0, %3", ret, oldval, uaddr, oparg);
++ __futex_atomic_op("mov %0, %4", ret, oldval, tmp, uaddr, oparg);
+ break;
+ case FUTEX_OP_ADD:
+- __futex_atomic_op("add %0, %1, %3", ret, oldval, uaddr, oparg);
++ __futex_atomic_op("add %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
+ break;
+ case FUTEX_OP_OR:
+- __futex_atomic_op("orr %0, %1, %3", ret, oldval, uaddr, oparg);
++ __futex_atomic_op("orr %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
+ break;
+ case FUTEX_OP_ANDN:
+- __futex_atomic_op("and %0, %1, %3", ret, oldval, uaddr, ~oparg);
++ __futex_atomic_op("and %0, %1, %4", ret, oldval, tmp, uaddr, ~oparg);
+ break;
+ case FUTEX_OP_XOR:
+- __futex_atomic_op("eor %0, %1, %3", ret, oldval, uaddr, oparg);
++ __futex_atomic_op("eor %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
+ break;
+ default:
+ ret = -ENOSYS;
--- /dev/null
+From d8e89b47e00ee80e920761145144640aac4cf71a Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+Date: Thu, 22 Sep 2011 10:32:25 +0100
+Subject: ARM: dma-mapping: free allocated page if unable to map
+
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+
+commit d8e89b47e00ee80e920761145144640aac4cf71a upstream.
+
+If the attempt to map a page for DMA fails (eg, because we're out of
+mapping space) then we must not hold on to the page we allocated for
+DMA - doing so will result in a memory leak.
+
+Reported-by: Bryan Phillippe <bp@darkforest.org>
+Tested-by: Bryan Phillippe <bp@darkforest.org>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/arm/mm/dma-mapping.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm/mm/dma-mapping.c
++++ b/arch/arm/mm/dma-mapping.c
+@@ -322,6 +322,8 @@ __dma_alloc(struct device *dev, size_t s
+
+ if (addr)
+ *handle = pfn_to_dma(dev, page_to_pfn(page));
++ else
++ __dma_free_buffer(page, size);
+
+ return addr;
+ }
--- /dev/null
+From cc41d586e8b4d76164fe7731c1c49be6cc5fc7e6 Mon Sep 17 00:00:00 2001
+From: Roland Stigge <stigge@antcom.de>
+Date: Wed, 21 Sep 2011 13:06:11 -0400
+Subject: hwmon: (ds620) Fix handling of negative temperatures
+
+From: Roland Stigge <stigge@antcom.de>
+
+commit cc41d586e8b4d76164fe7731c1c49be6cc5fc7e6 upstream.
+
+Signed (negative) temperatures were not handled correctly.
+
+Signed-off-by: Roland Stigge <stigge@antcom.de>
+Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/hwmon/ds620.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/hwmon/ds620.c
++++ b/drivers/hwmon/ds620.c
+@@ -72,7 +72,7 @@ struct ds620_data {
+ char valid; /* !=0 if following fields are valid */
+ unsigned long last_updated; /* In jiffies */
+
+- u16 temp[3]; /* Register values, word */
++ s16 temp[3]; /* Register values, word */
+ };
+
+ /*
cnic-bnx2-check-iscsi-support-early-in-bnx2_init_one.patch
bnx2fc-fix-kernel-panic-when-deleting-npiv-ports.patch
bnx2fc-scsi_dma_unmap-not-invoked-on-io-completions.patch
+hwmon-ds620-fix-handling-of-negative-temperatures.patch
+arm-dma-mapping-free-allocated-page-if-unable-to-map.patch
+arm-7091-1-errata-d-cache-line-maintenance-operation-by.patch
+arm-7099-1-futex-preserve-oldval-in-smp-__futex_atomic_op.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
