#define KHZ 1000
#define MHZ (KHZ * KHZ)
+enum exynos_usbdrd_phy_variant {
+ EXYNOS850_USBDRD_PHY,
+};
+
/**
* struct exynos_usbdrd_phy - driver data for Exynos USB PHY
* @reg_phy: USB PHY controller register memory base
* @core_clk: core clock for phy (ref clock)
* @reg_pmu: regmap for PMU block
* @extrefclk: frequency select settings when using 'separate reference clocks'
+ * @variant: ID to uniquely distinguish USB PHY variant
*/
struct exynos_usbdrd_phy {
void __iomem *reg_phy;
struct clk *core_clk;
struct regmap *reg_pmu;
u32 extrefclk;
+ enum exynos_usbdrd_phy_variant variant;
};
static void exynos_usbdrd_phy_isol(struct regmap *reg_pmu, bool isolate)
if (ret)
return ret;
- exynos850_usbdrd_utmi_init(phy);
+ switch (phy_drd->variant) {
+ case EXYNOS850_USBDRD_PHY:
+ exynos850_usbdrd_utmi_init(phy);
+ break;
+ default:
+ dev_err(phy->dev, "Failed to recognize phy variant\n");
+ }
clk_disable_unprepare(phy_drd->clk);
if (ret)
return ret;
- exynos850_usbdrd_utmi_exit(phy);
+ switch (phy_drd->variant) {
+ case EXYNOS850_USBDRD_PHY:
+ exynos850_usbdrd_utmi_exit(phy);
+ break;
+ default:
+ dev_err(phy->dev, "Failed to recognize phy variant\n");
+ }
clk_disable_unprepare(phy_drd->clk);
return err;
}
+ phy_drd->variant = dev_get_driver_data(dev);
+
return 0;
}
static const struct udevice_id exynos_usbdrd_phy_of_match[] = {
{
.compatible = "samsung,exynos850-usbdrd-phy",
+ .data = EXYNOS850_USBDRD_PHY,
},
{ }
};