mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);
}
+static int mcp251xfd_chip_xstbyen_enable(const struct mcp251xfd_priv *priv)
+{
+ /* Configure the INT0/GPIO0/XSTBY pin as transceiver standby control:
+ *
+ * - XSTBYEN=1: route the pin to the transceiver standby function
+ * - TRIS0=0: set output direction; the reset default is 1 (input),
+ * which leaves the pin floating HIGH and keeps the
+ * transceiver in standby regardless of XSTBYEN
+ * - LAT0=0: drive pin LOW => transceiver active (not in standby)
+ *
+ * All three bits are included in the mask; only XSTBYEN is set in
+ * val, so TRIS0 and LAT0 are cleared to 0 atomically.
+ *
+ * Pin behaviour by mode:
+ * - Config mode: controlled by LAT0 (LAT0=0 => LOW => active)
+ * - Normal mode: hardware drives pin LOW (active)
+ * - Sleep mode: hardware drives pin HIGH (standby)
+ */
+ return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON,
+ MCP251XFD_REG_IOCON_XSTBYEN |
+ MCP251XFD_REG_IOCON_TRIS0 |
+ MCP251XFD_REG_IOCON_LAT0,
+ MCP251XFD_REG_IOCON_XSTBYEN);
+}
+
static int mcp251xfd_chip_start(struct mcp251xfd_priv *priv)
{
int err;
priv->can.state = CAN_STATE_ERROR_ACTIVE;
+ if (priv->xstbyen) {
+ err = mcp251xfd_chip_xstbyen_enable(priv);
+ if (err)
+ goto out_chip_stop;
+ }
+
err = mcp251xfd_chip_set_normal_mode(priv);
if (err)
goto out_chip_stop;
u32 pin_mask = MCP251XFD_REG_IOCON_PM(offset);
int ret;
+ if (priv->xstbyen && offset == 0) {
+ netdev_err(priv->ndev, "Can't use GPIO 0 with XSTBYEN!\n");
+ return -EINVAL;
+ }
+
if (priv->rx_int && offset == 1) {
netdev_err(priv->ndev, "Can't use GPIO 1 with RX-INT!\n");
return -EINVAL;
priv->pll_enable = pll_enable;
priv->reg_vdd = reg_vdd;
priv->reg_xceiver = reg_xceiver;
+ priv->xstbyen = device_property_present(&spi->dev, "microchip,xstbyen");
priv->devtype_data = *(struct mcp251xfd_devtype_data *)spi_get_device_match_data(spi);
/* Errata Reference: