Nodes should be sorted for easier comparision with other boards.
Move pinctlr to the right location.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
};
};
-&qspi {
- status = "okay";
- flash@0 {
- compatible = "m25p80"; /* Micron MT25QU512ABB8ESF */
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x0>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- spi-max-frequency = <108000000>; /* Based on DC1 spec */
- partition@qspi-fsbl-uboot { /* for testing purpose */
- label = "qspi-fsbl-uboot";
- reg = <0x0 0x100000>;
- };
- partition@qspi-linux { /* for testing purpose */
- label = "qspi-linux";
- reg = <0x100000 0x500000>;
- };
- partition@qspi-device-tree { /* for testing purpose */
- label = "qspi-device-tree";
- reg = <0x600000 0x20000>;
- };
- partition@qspi-rootfs { /* for testing purpose */
- label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
- };
- };
-};
-
-&rtc {
- status = "okay";
-};
-
-&sata {
- status = "okay";
- /* SATA phy OOB timing settings */
- ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
- ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
- ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
- ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
- ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
- ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
- ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
- ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
- phy-names = "sata-phy";
- phys = <&lane3 PHY_TYPE_SATA 1 3 150000000>;
-};
-
-/* eMMC */
-&sdhci0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sdhci0_default>;
- bus-width = <8>;
- xlnx,mio_bank = <0>;
-};
-
-/* SD1 with level shifter */
-&sdhci1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sdhci1_default>;
- xlnx,mio_bank = <1>;
-};
-
-&serdes {
- status = "okay";
-};
-
-&uart0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0_default>;
-};
-
-/* ULPI SMSC USB3320 */
-&usb0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb0_default>;
-};
-
-&dwc3_0 {
- status = "okay";
- dr_mode = "host";
- snps,usb3_lpm_capable;
- phy-names = "usb3-phy";
- phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
-};
-
-&xilinx_drm {
- status = "okay";
-};
-
-&xlnx_dp {
- status = "okay";
- phy-names = "dp-phy0", "dp-phy1";
- phys = <&lane1 PHY_TYPE_DP 0 0 27000000>,
- <&lane0 PHY_TYPE_DP 1 1 27000000>;
-};
-
-&xlnx_dp_sub {
- status = "okay";
- xlnx,vid-clk-pl;
-};
-
-&xlnx_dp_snd_pcm0 {
- status = "okay";
-};
-
-&xlnx_dp_snd_pcm1 {
- status = "okay";
-};
-
-&xlnx_dp_snd_card {
- status = "okay";
-};
-
-&xlnx_dp_snd_codec0 {
- status = "okay";
-};
-
-&xlnx_dpdma {
- status = "okay";
-};
-
&pinctrl0 {
status = "okay";
pinctrl_i2c1_default: i2c1-default {
};
};
};
+
+&qspi {
+ status = "okay";
+ flash@0 {
+ compatible = "m25p80"; /* Micron MT25QU512ABB8ESF */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <108000000>; /* Based on DC1 spec */
+ partition@qspi-fsbl-uboot { /* for testing purpose */
+ label = "qspi-fsbl-uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@qspi-linux { /* for testing purpose */
+ label = "qspi-linux";
+ reg = <0x100000 0x500000>;
+ };
+ partition@qspi-device-tree { /* for testing purpose */
+ label = "qspi-device-tree";
+ reg = <0x600000 0x20000>;
+ };
+ partition@qspi-rootfs { /* for testing purpose */
+ label = "qspi-rootfs";
+ reg = <0x620000 0x5E0000>;
+ };
+ };
+};
+
+&rtc {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+ /* SATA phy OOB timing settings */
+ ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
+ ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
+ ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
+ ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+ ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
+ ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
+ ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
+ ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+ phy-names = "sata-phy";
+ phys = <&lane3 PHY_TYPE_SATA 1 3 150000000>;
+};
+
+/* eMMC */
+&sdhci0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhci0_default>;
+ bus-width = <8>;
+ xlnx,mio_bank = <0>;
+};
+
+/* SD1 with level shifter */
+&sdhci1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhci1_default>;
+ xlnx,mio_bank = <1>;
+};
+
+&serdes {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0_default>;
+};
+
+/* ULPI SMSC USB3320 */
+&usb0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0_default>;
+};
+
+&dwc3_0 {
+ status = "okay";
+ dr_mode = "host";
+ snps,usb3_lpm_capable;
+ phy-names = "usb3-phy";
+ phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
+};
+
+&xilinx_drm {
+ status = "okay";
+};
+
+&xlnx_dp {
+ status = "okay";
+ phy-names = "dp-phy0", "dp-phy1";
+ phys = <&lane1 PHY_TYPE_DP 0 0 27000000>,
+ <&lane0 PHY_TYPE_DP 1 1 27000000>;
+};
+
+&xlnx_dp_sub {
+ status = "okay";
+ xlnx,vid-clk-pl;
+};
+
+&xlnx_dp_snd_pcm0 {
+ status = "okay";
+};
+
+&xlnx_dp_snd_pcm1 {
+ status = "okay";
+};
+
+&xlnx_dp_snd_card {
+ status = "okay";
+};
+
+&xlnx_dp_snd_codec0 {
+ status = "okay";
+};
+
+&xlnx_dpdma {
+ status = "okay";
+};
};
};
-&rtc {
- status = "okay";
-};
-
-&spi0 {
- status = "okay";
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_spi0_default>;
-
- spi0_flash0: spi0_flash0@0 {
- compatible = "m25p80";
- #address-cells = <1>;
- #size-cells = <1>;
- spi-max-frequency = <50000000>;
- reg = <0>;
-
- spi0_flash0@0 {
- label = "spi0_flash0";
- reg = <0x0 0x100000>;
- };
- };
-};
-
-&spi1 {
- status = "okay";
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_spi1_default>;
-
- spi1_flash0: spi1_flash0@0 {
- compatible = "mtd_dataflash";
- #address-cells = <1>;
- #size-cells = <1>;
- spi-max-frequency = <20000000>;
- reg = <0>;
-
- spi1_flash0@0 {
- label = "spi1_flash0";
- reg = <0x0 0x84000>;
- };
- };
-};
-
-/* ULPI SMSC USB3320 */
-&usb1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb1_default>;
-};
-
-&dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&uart0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0_default>;
-};
-
-&uart1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1_default>;
-};
-
&pinctrl0 {
status = "okay";
pinctrl_can0_default: can0-default {
};
};
};
+
+&rtc {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+ num-cs = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0_default>;
+
+ spi0_flash0: spi0_flash0@0 {
+ compatible = "m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+
+ spi0_flash0@0 {
+ label = "spi0_flash0";
+ reg = <0x0 0x100000>;
+ };
+ };
+};
+
+&spi1 {
+ status = "okay";
+ num-cs = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
+
+ spi1_flash0: spi1_flash0@0 {
+ compatible = "mtd_dataflash";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+
+ spi1_flash0@0 {
+ label = "spi1_flash0";
+ reg = <0x0 0x84000>;
+ };
+ };
+};
+
+/* ULPI SMSC USB3320 */
+&usb1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1_default>;
+};
+
+&dwc3_1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0_default>;
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_default>;
+};
};
-&sdhci0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sdhci0_default>;
- no-1-8-v;
- xlnx,mio_bank = <0>;
-};
-
-&uart0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0_default>;
-};
-
-&uart1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1_default>;
-};
-
-&watchdog0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_watchdog0_default>;
-};
-
-&ttc0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ttc0_default>;
-};
-
-&ttc1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ttc1_default>;
-};
-
-&ttc2 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ttc2_default>;
-};
-
-&ttc3 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ttc3_default>;
-};
-
&pinctrl0 {
status = "okay";
pinctrl_i2c0_default: i2c0-default {
};
};
};
+
+&sdhci0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhci0_default>;
+ no-1-8-v;
+ xlnx,mio_bank = <0>;
+};
+
+&ttc0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ttc0_default>;
+};
+
+&ttc1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ttc1_default>;
+};
+
+&ttc2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ttc2_default>;
+};
+
+&ttc3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ttc3_default>;
+};
+
+&uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0_default>;
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_default>;
+};
+
+&watchdog0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_watchdog0_default>;
+};
};
};
-&qspi {
- status = "okay";
- is-dual = <1>;
- flash@0 {
- compatible = "m25p80"; /* 32MB */
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x0>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
- spi-max-frequency = <108000000>; /* Based on DC1 spec */
- partition@qspi-fsbl-uboot { /* for testing purpose */
- label = "qspi-fsbl-uboot";
- reg = <0x0 0x100000>;
- };
- partition@qspi-linux { /* for testing purpose */
- label = "qspi-linux";
- reg = <0x100000 0x500000>;
- };
- partition@qspi-device-tree { /* for testing purpose */
- label = "qspi-device-tree";
- reg = <0x600000 0x20000>;
- };
- partition@qspi-rootfs { /* for testing purpose */
- label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
- };
- };
-};
-
-&rtc {
- status = "okay";
-};
-
-&sata {
- status = "okay";
- /* SATA OOB timing settings */
- ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
- ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
- ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
- ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
- ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
- ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
- ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
- ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
- phy-names = "sata-phy";
- phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
-};
-
-/* SD1 with level shifter */
-&sdhci1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sdhci1_default>;
- no-1-8-v;
- xlnx,mio_bank = <1>;
-};
-
-&serdes {
- status = "okay";
-};
-
-&uart0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0_default>;
-};
-
-&uart1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1_default>;
-};
-
-/* ULPI SMSC USB3320 */
-&usb0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb0_default>;
-};
-
-&dwc3_0 {
- status = "okay";
- dr_mode = "host";
- snps,usb3_lpm_capable;
- phy-names = "usb3-phy";
- phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
-};
-
-&xilinx_drm {
- status = "okay";
-};
-
-&xlnx_dp {
- status = "okay";
- phy-names = "dp-phy0", "dp-phy1";
- phys = <&lane1 PHY_TYPE_DP 0 3 27000000>, <&lane0 PHY_TYPE_DP 1 3 27000000>;
-};
-
-&xlnx_dp_sub {
- status = "okay";
-};
-
-&xlnx_dp_snd_pcm0 {
- status = "okay";
-};
-
-&xlnx_dp_snd_pcm1 {
- status = "okay";
-};
-
-&xlnx_dp_snd_card {
- status = "okay";
-};
-
-&xlnx_dp_snd_codec0 {
- status = "okay";
-};
-
-&xlnx_dpdma {
- status = "okay";
-};
-
&pinctrl0 {
status = "okay";
pinctrl_i2c0_default: i2c0-default {
};
};
};
+
+&qspi {
+ status = "okay";
+ is-dual = <1>;
+ flash@0 {
+ compatible = "m25p80"; /* 32MB */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
+ spi-max-frequency = <108000000>; /* Based on DC1 spec */
+ partition@qspi-fsbl-uboot { /* for testing purpose */
+ label = "qspi-fsbl-uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@qspi-linux { /* for testing purpose */
+ label = "qspi-linux";
+ reg = <0x100000 0x500000>;
+ };
+ partition@qspi-device-tree { /* for testing purpose */
+ label = "qspi-device-tree";
+ reg = <0x600000 0x20000>;
+ };
+ partition@qspi-rootfs { /* for testing purpose */
+ label = "qspi-rootfs";
+ reg = <0x620000 0x5E0000>;
+ };
+ };
+};
+
+&rtc {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+ /* SATA OOB timing settings */
+ ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
+ ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
+ ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
+ ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+ ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
+ ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
+ ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
+ ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+ phy-names = "sata-phy";
+ phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
+};
+
+/* SD1 with level shifter */
+&sdhci1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhci1_default>;
+ no-1-8-v;
+ xlnx,mio_bank = <1>;
+};
+
+&serdes {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0_default>;
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_default>;
+};
+
+/* ULPI SMSC USB3320 */
+&usb0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0_default>;
+};
+
+&dwc3_0 {
+ status = "okay";
+ dr_mode = "host";
+ snps,usb3_lpm_capable;
+ phy-names = "usb3-phy";
+ phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
+};
+
+&xilinx_drm {
+ status = "okay";
+};
+
+&xlnx_dp {
+ status = "okay";
+ phy-names = "dp-phy0", "dp-phy1";
+ phys = <&lane1 PHY_TYPE_DP 0 3 27000000>, <&lane0 PHY_TYPE_DP 1 3 27000000>;
+};
+
+&xlnx_dp_sub {
+ status = "okay";
+};
+
+&xlnx_dp_snd_pcm0 {
+ status = "okay";
+};
+
+&xlnx_dp_snd_pcm1 {
+ status = "okay";
+};
+
+&xlnx_dp_snd_card {
+ status = "okay";
+};
+
+&xlnx_dp_snd_codec0 {
+ status = "okay";
+};
+
+&xlnx_dpdma {
+ status = "okay";
+};