-I$(srctree)/lib/mbedtls/external/mbedtls/include) \
$(if $(CONFIG_$(PHASE_)SYS_THUMB_BUILD), \
$(if $(CONFIG_HAS_THUMB2), \
- $(if $(CONFIG_CPU_V7M), \
+ $(if $(CONFIG_CPU_V7M_V8M), \
-I$(srctree)/arch/arm/thumb1/include), \
-I$(srctree)/arch/arm/thumb1/include)) \
-I$(srctree)/arch/$(ARCH)/include \
-I$(srctree)/lib/mbedtls/external/mbedtls/include) \
$(if $(CONFIG_$(PHASE_)SYS_THUMB_BUILD), \
$(if $(CONFIG_HAS_THUMB2), \
- $(if $(CONFIG_CPU_V7M), \
+ $(if $(CONFIG_CPU_V7M_V8M), \
-I$(srctree)/arch/arm/thumb1/include), \
-I$(srctree)/arch/arm/thumb1/include)) \
-I$(srctree)/arch/$(ARCH)/include \
cmd_copy = cp $< $@
ifeq ($(CONFIG_OF_UPSTREAM),y)
+ifeq ($(CONFIG_CPU_V8M),y)
+dt_dir := dts/upstream/src/arm64
+else
ifeq ($(CONFIG_ARM64),y)
dt_dir := dts/upstream/src/arm64
else
dt_dir := dts/upstream/src/$(ARCH)
endif
+endif
else
dt_dir := arch/$(ARCH)/dts
endif
select SYS_CACHE_SHIFT_6
imply SYS_ARM_MMU
-config CPU_V7M
+# ARMv7-M/ARMv8-M
+config CPU_V7M_V8M
bool
select HAS_THUMB2
select SYS_ARM_MPU
select THUMB2_KERNEL
select NVIC
+config CPU_V7M
+ bool
+ select CPU_V7M_V8M
+
config CPU_V7R
bool
select HAS_THUMB2
select SYS_ARM_MPU
select SYS_CACHE_SHIFT_6
+config CPU_V8M
+ bool
+ select CPU_V7M_V8M
+
config SYS_CPU
default "arm720t" if CPU_ARM720T
default "arm920t" if CPU_ARM920T
default "armv7" if CPU_V7A
default "armv7" if CPU_V7R
default "armv7m" if CPU_V7M
+ default "armv7m" if CPU_V8M
default "armv8" if ARM64
config SYS_ARM_ARCH
default 7 if CPU_V7A
default 7 if CPU_V7M
default 7 if CPU_V7R
+ default 7 if CPU_V8M
default 8 if ARM64
choice
config SYS_ARCH_TIMER
bool "ARM Generic Timer support"
- depends on CPU_V7A || CPU_V7M || ARM64
+ depends on CPU_V7A || CPU_V7M_V8M || ARM64
default y if ARM64
help
The ARM Generic Timer (aka arch-timer) provides an architected
$(call cc-option, -march=armv7))
arch-$(CONFIG_CPU_V7M) =-march=armv7-m
arch-$(CONFIG_CPU_V7R) =-march=armv7-r
+arch-$(CONFIG_CPU_V8M) =-march=armv8-m.main
ifeq ($(CONFIG_ARM64_CRC32),y)
arch-$(CONFIG_ARM64) =-march=armv8-a+crc
else
tune-$(CONFIG_CPU_ARM1176) =
tune-$(CONFIG_CPU_V7A) =-mtune=generic-armv7-a
tune-$(CONFIG_CPU_V7R) =
+tune-$(CONFIG_CPU_V8M) =
tune-$(CONFIG_ARM64) =
# Evaluate tune cc-option calls now
*/
int cleanup_before_linux(void)
{
+ if (!CONFIG_IS_ENABLED(LIB_BOOTM) && !CONFIG_IS_ENABLED(LIB_BOOTZ))
+ return 0;
+
/*
* this function is called just before we call linux
* it prepares the processor for linux
}
/*
- * Perform the low-level reset.
+ * Perform the low-level reset. ARMv7M only.
*/
+#if IS_ENABLED(CONFIG_CPU_V7M)
void reset_cpu(void)
{
/*
| (V7M_SCB->aircr & V7M_AIRCR_PRIGROUP_MSK)
| V7M_AIRCR_SYSRESET, &V7M_SCB->aircr);
}
+#endif
void spl_perform_arch_fixups(struct spl_image_info *spl_image)
{
- spl_image->entry_point |= 0x1;
+ if (IS_ENABLED(CONFIG_XPL_BUILD))
+ spl_image->entry_point |= 0x1;
}
#include <linux/bitops.h>
#endif
-#ifdef CONFIG_CPU_V7M
+#ifdef CONFIG_CPU_V7M_V8M
#define AP_SHIFT 24
#define XN_SHIFT 28
#define TEX_SHIFT 19
.syntax unified
#endif
-#ifdef CONFIG_CPU_V7M
+#ifdef CONFIG_CPU_V7M_V8M
#define AR_CLASS(x...)
#define M_CLASS(x...) x
#else
obj-$(CONFIG_$(PHASE_)LIB_BOOTZ) += zimage.o
obj-$(CONFIG_$(PHASE_)LIB_BOOTM) += bootm.o
-ifdef CONFIG_CPU_V7M
+ifdef CONFIG_CPU_V7M_V8M
obj-y += vectors_m.o crt0.o
else ifdef CONFIG_ARM64
obj-y += crt0_64.o
obj-y += relocate.o
endif
-obj-$(CONFIG_CPU_V7M) += cmd_boot.o
+obj-$(CONFIG_CPU_V7M_V8M) += cmd_boot.o
obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
else
CFLAGS_REMOVE_sections.o := $(LTO_CFLAGS)
obj-y += stack.o
-ifdef CONFIG_CPU_V7M
+ifdef CONFIG_CPU_V7M_V8M
obj-y += interrupts_m.o
else ifdef CONFIG_ARM64
obj-$(CONFIG_FSL_LAYERSCAPE) += ccn504.o
void (*kernel_entry)(int zero, int arch, uint params);
unsigned long r2;
kernel_entry = (void (*)(int, int, uint))images->ep;
-#ifdef CONFIG_CPU_V7M
+#ifdef CONFIG_CPU_V7M_V8M
ulong addr = (ulong)kernel_entry | 1;
kernel_entry = (void *)addr;
#endif
#endif
ldr r0, [r9, #GD_RELOC_OFF] /* r0 = gd->reloc_off */
add lr, lr, r0
-#if defined(CONFIG_CPU_V7M)
+#if defined(CONFIG_CPU_V7M_V8M)
orr lr, #1 /* As required by Thumb-only */
#endif
ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
#include <config.h>
#include <elf.h>
#include <linux/linkage.h>
-#ifdef CONFIG_CPU_V7M
+#ifdef CONFIG_CPU_V7M_V8M
#include <asm/armv7m.h>
#endif
WEAK(relocate_vectors)
-#ifdef CONFIG_CPU_V7M
+#ifdef CONFIG_CPU_V7M_V8M
/*
* On ARMv7-M we only have to write the new vector address
* to VTOR register.
#if defined(CONFIG_ARM64)
hlt #0xf000
-#elif defined(CONFIG_CPU_V7M)
+#elif defined(CONFIG_CPU_V7M_V8M)
bkpt #0xab
#elif defined(CONFIG_SYS_THUMB_BUILD)
svc #0xab
.long __invalid_entry @ 13 - Reserved
.long __invalid_entry @ 14 - PendSV
.long __invalid_entry @ 15 - SysTick
- .rept 255 - 16
+#ifdef CONFIG_CPU_V7M
+ .rept 256 - 16
+#else /* V8M / V8R */
+ .rept 512 - 16
+#endif
.long __invalid_entry @ 16..255 - External Interrupts
.endr
config BOOTP_VCI_STRING
string
depends on CMD_BOOTP
- default "U-Boot.armv7" if CPU_V7A || CPU_V7M || CPU_V7R
+ default "U-Boot.armv7" if CPU_V7A || CPU_V7M_V8M || CPU_V7R
default "U-Boot.armv8" if ARM64
default "U-Boot.arm" if ARM
default "U-Boot"
endif
ifeq ($(CONFIG_OF_UPSTREAM),y)
+ifeq ($(CONFIG_CPU_V8M),y)
+dt_dir := dts/upstream/src/arm64
+else
ifeq ($(CONFIG_ARM64),y)
dt_dir := dts/upstream/src/arm64
else
dt_dir := dts/upstream/src/$(ARCH)
endif
+endif
else
dt_dir := arch/$(ARCH)/dts
endif
obj-$(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2) += \
efi_selftest_unicode_collation.o
-ifeq ($(CONFIG_CPU_V7A)$(CONFIG_CPU_V7M)$(CONFIG_CPU_V7R),y)
+ifeq ($(CONFIG_CPU_V7A)$(CONFIG_CPU_V7M_V8M)$(CONFIG_CPU_V7R),y)
obj-y += efi_selftest_unaligned.o
endif
obj-$(CONFIG_EFI_LOADER_HII) += efi_selftest_hii.o