]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: axis: Add ARTPEC-8 Grizzly dts support
authorSeonGu Kang <ksk4725@coasia.com>
Mon, 1 Sep 2025 05:19:25 +0000 (10:49 +0530)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Thu, 4 Sep 2025 15:08:40 +0000 (17:08 +0200)
Add initial devcie tree for the ARTPEC-8 Grizzly board.
The ARTPEC-8 Grizzly is a small board developed by Axis,
based on the Axis ARTPEC-8 SoC.

Signed-off-by: SeonGu Kang <ksk4725@coasia.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Link: https://lore.kernel.org/r/20250901051926.59970-6-ravi.patel@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/exynos/axis/Makefile [new file with mode: 0644]
arch/arm64/boot/dts/exynos/axis/artpec8-grizzly.dts [new file with mode: 0644]

diff --git a/arch/arm64/boot/dts/exynos/axis/Makefile b/arch/arm64/boot/dts/exynos/axis/Makefile
new file mode 100644 (file)
index 0000000..ccf00de
--- /dev/null
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+dtb-$(CONFIG_ARCH_ARTPEC) += \
+       artpec8-grizzly.dtb
diff --git a/arch/arm64/boot/dts/exynos/axis/artpec8-grizzly.dts b/arch/arm64/boot/dts/exynos/axis/artpec8-grizzly.dts
new file mode 100644 (file)
index 0000000..5ae864e
--- /dev/null
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Axis ARTPEC-8 Grizzly board device tree source
+ *
+ * Copyright (c) 2025 Samsung Electronics Co., Ltd.
+ *             https://www.samsung.com
+ * Copyright (c) 2025  Axis Communications AB.
+ *             https://www.axis.com
+ */
+
+/dts-v1/;
+#include "artpec8.dtsi"
+#include "artpec8-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+/ {
+       model = "ARTPEC-8 grizzly board";
+       compatible = "axis,artpec8-grizzly", "axis,artpec8";
+
+       aliases {
+               serial0 = &serial_0;
+       };
+
+       chosen {
+               stdout-path = &serial_0;
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x0 0x80000000 0x0 0x80000000>;
+       };
+};
+
+&osc_clk {
+       clock-frequency = <50000000>;
+};