]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
perf/x86/intel: Only check GP counters for PEBS constraints validation
authorDapeng Mi <dapeng1.mi@linux.intel.com>
Sat, 28 Feb 2026 05:33:19 +0000 (13:33 +0800)
committerPeter Zijlstra <peterz@infradead.org>
Thu, 12 Mar 2026 10:29:17 +0000 (11:29 +0100)
It's good enough to only check GP counters for PEBS constraints
validation since constraints overlap can only happen on GP counters.

Besides opportunistically refine the code style and use pr_warn() to
replace pr_info() as the message itself is a warning message.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260228053320.140406-1-dapeng1.mi@linux.intel.com
arch/x86/events/intel/core.c

index cf3a4fe06ff26c3da41ae1818df7fe4e4232af53..4768236c054bbcf86eebaffca1944a5be2c3646d 100644 (file)
@@ -5770,7 +5770,7 @@ static void __intel_pmu_check_dyn_constr(struct event_constraint *constr,
                        }
 
                        if (check_fail) {
-                               pr_info("The two events 0x%llx and 0x%llx may not be "
+                               pr_warn("The two events 0x%llx and 0x%llx may not be "
                                        "fully scheduled under some circumstances as "
                                        "%s.\n",
                                        c1->code, c2->code, dyn_constr_type_name[type]);
@@ -5783,6 +5783,7 @@ static void intel_pmu_check_dyn_constr(struct pmu *pmu,
                                       struct event_constraint *constr,
                                       u64 cntr_mask)
 {
+       u64 gp_mask = GENMASK_ULL(INTEL_PMC_MAX_GENERIC - 1, 0);
        enum dyn_constr_type i;
        u64 mask;
 
@@ -5797,20 +5798,25 @@ static void intel_pmu_check_dyn_constr(struct pmu *pmu,
                                mask = x86_pmu.lbr_counters;
                        break;
                case DYN_CONSTR_ACR_CNTR:
-                       mask = hybrid(pmu, acr_cntr_mask64) & GENMASK_ULL(INTEL_PMC_MAX_GENERIC - 1, 0);
+                       mask = hybrid(pmu, acr_cntr_mask64) & gp_mask;
                        break;
                case DYN_CONSTR_ACR_CAUSE:
-                       if (hybrid(pmu, acr_cntr_mask64) == hybrid(pmu, acr_cause_mask64))
+                       if (hybrid(pmu, acr_cntr_mask64) ==
+                                       hybrid(pmu, acr_cause_mask64))
                                continue;
-                       mask = hybrid(pmu, acr_cause_mask64) & GENMASK_ULL(INTEL_PMC_MAX_GENERIC - 1, 0);
+                       mask = hybrid(pmu, acr_cause_mask64) & gp_mask;
                        break;
                case DYN_CONSTR_PEBS:
-                       if (x86_pmu.arch_pebs)
-                               mask = hybrid(pmu, arch_pebs_cap).counters;
+                       if (x86_pmu.arch_pebs) {
+                               mask = hybrid(pmu, arch_pebs_cap).counters &
+                                      gp_mask;
+                       }
                        break;
                case DYN_CONSTR_PDIST:
-                       if (x86_pmu.arch_pebs)
-                               mask = hybrid(pmu, arch_pebs_cap).pdists;
+                       if (x86_pmu.arch_pebs) {
+                               mask = hybrid(pmu, arch_pebs_cap).pdists &
+                                      gp_mask;
+                       }
                        break;
                default:
                        pr_warn("Unsupported dynamic constraint type %d\n", i);