* gcc.target/i386/lzcnt-1.c: Allow a different lzcntw output register.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@235431 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index bbaa3a2f1a28d5a07450245b776fb67c1d5aefe0..65fe0d0945fabcd84e0d666d7125bdada08c3616 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2016-04-26  Bernd Schmidt  <bschmidt@redhat.com>
+
+       * gcc.target/i386/lzcnt-1.c: Allow a different lzcntw output register.
+
 2016-04-25  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/70780

diff --git a/gcc/testsuite/gcc.target/i386/lzcnt-1.c b/gcc/testsuite/gcc.target/i386/lzcnt-1.c
index f6240d1ba787cc9cc2e7ba41424bfb1b4e367a79..c7054d16a9270900b99b6efc622764e215a9b931 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/lzcnt-1.c
+++ b/gcc/testsuite/gcc.target/i386/lzcnt-1.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -mlzcnt " } */
-/* { dg-final { scan-assembler "lzcntw\[^\\n]*(%|)ax" } } */
+/* { dg-final { scan-assembler "lzcntw\[^\\n]*(%|)\[ad\]\[xi\]" } } */
 
 #include <x86intrin.h>