]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ARM: dts: imx: add required clocks and clock-names for ccm
authorFrank Li <Frank.Li@nxp.com>
Wed, 21 Jan 2026 18:04:17 +0000 (13:04 -0500)
committerFrank Li <Frank.Li@nxp.com>
Mon, 6 Apr 2026 01:35:23 +0000 (21:35 -0400)
Add required clocks and clock-names for ccm to fix below CHECK_DTBS
warnings:
  arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dtb: clock-controller@20c4000 (fsl,imx6q-ccm): clock-names:0: 'osc' was expected
        from schema $id: http://devicetree.org/schemas/clock/imx6q-clock.yaml#

Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dts
arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts
arch/arm/boot/dts/nxp/imx/imx6dl-lanmcu.dts
arch/arm/boot/dts/nxp/imx/imx6dl-plybas.dts
arch/arm/boot/dts/nxp/imx/imx6dl-plym2m.dts
arch/arm/boot/dts/nxp/imx/imx6dl-prtmvt.dts
arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi
arch/arm/boot/dts/nxp/imx/imx6dl-victgo.dts
arch/arm/boot/dts/nxp/imx/imx6q-prtwd2.dts
arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi

index 9bb36db131c21956a33f0a5a013c5bb4cffe1890..aed4fb7843e2f2a5bc57499aafd3431b582437dd 100644 (file)
 };
 
 &clks {
-       clocks = <&clock_ksz8081>;
-       clock-names = "enet_ref_pad";
+       clocks = <&osc>, <&ckil>, <&ckih1>, <&anaclk1>, <&anaclk2>, <&clock_ksz8081>;
+       clock-names = "osc", "ckil", "ckih1", "anaclk1", "anaclk2", "enet_ref_pad";
        assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
        assigned-clock-parents = <&clock_ksz8081>;
 };
index 5ed55f74b398f24a69245dbf88f5c93ee0d347d8..5f61eeb9fad0c590e778d82d42d201fc2b0a7c3f 100644 (file)
@@ -66,8 +66,8 @@
 };
 
 &clks {
-       clocks = <&rmii_clk>;
-       clock-names = "enet_ref_pad";
+       clocks = <&osc>, <&ckil>, <&ckih1>, <&anaclk1>, <&anaclk2>, <&rmii_clk>;
+       clock-names = "osc", "ckil", "ckih1", "anaclk1", "anaclk2", "enet_ref_pad";
        assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
        assigned-clock-parents = <&rmii_clk>;
 };
index 47a6d63c8e04cf28795310aafcdd3b2b05740830..9bde6546255825ed871aaee592347e23da4d4141 100644 (file)
 };
 
 &clks {
-       clocks = <&clock_ksz8081>;
-       clock-names = "enet_ref_pad";
+       clocks = <&osc>, <&ckil>, <&ckih1>, <&anaclk1>, <&anaclk2>, <&clock_ksz8081>;
+       clock-names = "osc", "ckil", "ckih1", "anaclk1", "anaclk2", "enet_ref_pad";
        assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
        assigned-clock-parents = <&clock_ksz8081>;
 };
index 84f34da06267ebd477fbe71b465a44ffe5b4c098..69e790ba56624ee8ee8611ddac5ae3c9585a5c2b 100644 (file)
 };
 
 &clks {
-       clocks = <&clk50m_phy>;
-       clock-names = "enet_ref_pad";
+       clocks = <&osc>, <&ckil>, <&ckih1>, <&anaclk1>, <&anaclk2>, <&clk50m_phy>;
+       clock-names = "osc", "ckil", "ckih1", "anaclk1", "anaclk2", "enet_ref_pad";
        assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
        assigned-clock-parents = <&clk50m_phy>;
 };
index 0ef24a07dedf986efdf4ce8ad4032814752e7271..fbff77944ce327f390abcabde638f4162d45eadf 100644 (file)
 };
 
 &clks {
-       clocks = <&clk50m_phy>;
-       clock-names = "enet_ref_pad";
+       clocks = <&osc>, <&ckil>, <&ckih1>, <&anaclk1>, <&anaclk2>, <&clk50m_phy>;
+       clock-names = "osc", "ckil", "ckih1", "anaclk1", "anaclk2", "enet_ref_pad";
        assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
        assigned-clock-parents = <&clk50m_phy>;
 };
index 2160b71778355623a9f124975e2cd4dfba4be900..dcd5a4099c602d03704c35860f4d6f0beed1862d 100644 (file)
 };
 
 &clks {
-       clocks = <&clk50m_phy>;
-       clock-names = "enet_ref_pad";
+       clocks = <&osc>, <&ckil>, <&ckih1>, <&anaclk1>, <&anaclk2>, <&clk50m_phy>;
+       clock-names = "osc", "ckil", "ckih1", "anaclk1", "anaclk2", "enet_ref_pad";
        assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_ENET_REF_SEL>;
        assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, <&clk50m_phy>;
 };
index d5baec5e7a7824c05ca64c36a1839efff0bd7f71..fb674ac2c2485a818ae593c63388bcec548a100e 100644 (file)
@@ -71,8 +71,9 @@
 };
 
 &clks {
-       clocks = <&rtc_sqw>;
-       clock-names = "ckil";
+       clocks = <&osc>, <&rtc_sqw>, <&ckih1>, <&anaclk1>, <&anaclk2>;
+       clock-names = "osc", "ckil", "ckih1", "anaclk1", "anaclk2";
+
        assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
                          <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
        assigned-clock-parents = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
index 76b0007d20ad22eee738ab40ed126435a8fd17fd..18019a6bb3af07c43730ef60f884fefd810553bd 100644 (file)
 };
 
 &clks {
-       clocks = <&clk50m_phy>;
-       clock-names = "enet_ref_pad";
+       clocks = <&osc>, <&ckil>, <&ckih1>, <&anaclk1>, <&anaclk2>, <&clk50m_phy>;
+       clock-names = "osc", "ckil", "ckih1", "anaclk1", "anaclk2", "enet_ref_pad";
        assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
        assigned-clock-parents = <&clk50m_phy>;
 };
index 0e02e448db1085e7f508e55cd55d4441d2f51a54..5ef1ce80869914f8866cf71e79dc1b3d54d56f5f 100644 (file)
@@ -57,8 +57,8 @@
 };
 
 &clks {
-       clocks = <&clk50m_phy>;
-       clock-names = "enet_ref_pad";
+       clocks = <&osc>, <&ckil>, <&ckih1>, <&anaclk1>, <&anaclk2>, <&clk50m_phy>;
+       clock-names = "osc", "ckil", "ckih1", "anaclk1", "anaclk2", "enet_ref_pad";
        assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
        assigned-clock-parents = <&clk50m_phy>;
 };
index 131a3428ddb86796ed843b46cbae12f5d095b2f4..894e5c28b2ac036cc29a2d23d4c6451f0da9dff4 100644 (file)
 };
 
 &clks {
-       clocks = <&clk50m_phy>;
-       clock-names = "enet_ref_pad";
+       clocks = <&osc>, <&ckil>, <&ckih1>, <&anaclk1>, <&anaclk2>, <&clk50m_phy>;
+       clock-names = "osc", "ckil", "ckih1", "anaclk1", "anaclk2", "enet_ref_pad";
        assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
        assigned-clock-parents = <&clk50m_phy>;
 };