LWMI_FEATURE_ID_CPU_IPL = 0x09,
};
+enum lwmi_feature_id_gpu {
+ LWMI_FEATURE_ID_GPU_NV_PPAB = 0x01,
+ LWMI_FEATURE_ID_GPU_NV_CTGP = 0x02,
+ LWMI_FEATURE_ID_GPU_TEMP = 0x03,
+ LWMI_FEATURE_ID_GPU_AC_OFFSET = 0x04,
+ LWMI_FEATURE_ID_DGPU_BOOST_CLK = 0x06,
+ LWMI_FEATURE_ID_DGPU_EN = 0x07,
+ LWMI_FEATURE_ID_GPU_MODE = 0x08,
+ LWMI_FEATURE_ID_DGPU_DIDVID = 0x09,
+ LWMI_FEATURE_ID_GPU_NV_BPL = 0x0a,
+ LWMI_FEATURE_ID_GPU_NV_CPU_BOOST = 0x0b,
+};
+
#define LWMI_FEATURE_ID_FAN_RPM 0x03
#define LWMI_TYPE_ID_CROSSLOAD 0x01
.type_id = LWMI_TYPE_ID_CROSSLOAD,
};
+static struct tunable_attr_01 gpu_nv_ppab = {
+ .device_id = LWMI_DEVICE_ID_GPU,
+ .feature_id = LWMI_FEATURE_ID_GPU_NV_PPAB,
+ .type_id = LWMI_TYPE_ID_NONE,
+};
+
+static struct tunable_attr_01 gpu_nv_ctgp = {
+ .device_id = LWMI_DEVICE_ID_GPU,
+ .feature_id = LWMI_FEATURE_ID_GPU_NV_CTGP,
+ .type_id = LWMI_TYPE_ID_NONE,
+};
+
+static struct tunable_attr_01 gpu_temp = {
+ .device_id = LWMI_DEVICE_ID_GPU,
+ .feature_id = LWMI_FEATURE_ID_GPU_TEMP,
+ .type_id = LWMI_TYPE_ID_NONE,
+};
+
+static struct tunable_attr_01 gpu_nv_ac_offset = {
+ .device_id = LWMI_DEVICE_ID_GPU,
+ .feature_id = LWMI_FEATURE_ID_GPU_AC_OFFSET,
+ .type_id = LWMI_TYPE_ID_NONE,
+};
+
+static struct tunable_attr_01 dgpu_boost_clk = {
+ .device_id = LWMI_DEVICE_ID_GPU,
+ .feature_id = LWMI_FEATURE_ID_DGPU_BOOST_CLK,
+ .type_id = LWMI_TYPE_ID_NONE,
+};
+
+static struct tunable_attr_01 dgpu_enable = {
+ .device_id = LWMI_DEVICE_ID_GPU,
+ .feature_id = LWMI_FEATURE_ID_DGPU_EN,
+ .type_id = LWMI_TYPE_ID_NONE,
+};
+
+static struct tunable_attr_01 gpu_mode = {
+ .device_id = LWMI_DEVICE_ID_GPU,
+ .feature_id = LWMI_FEATURE_ID_GPU_MODE,
+ .type_id = LWMI_TYPE_ID_NONE,
+};
+
+static struct tunable_attr_01 dgpu_didvid = {
+ .device_id = LWMI_DEVICE_ID_GPU,
+ .feature_id = LWMI_FEATURE_ID_DGPU_DIDVID,
+ .type_id = LWMI_TYPE_ID_NONE,
+};
+
+static struct tunable_attr_01 gpu_nv_bpl = {
+ .device_id = LWMI_DEVICE_ID_GPU,
+ .feature_id = LWMI_FEATURE_ID_GPU_NV_BPL,
+ .type_id = LWMI_TYPE_ID_NONE,
+};
+
+static struct tunable_attr_01 gpu_nv_cpu_boost = {
+ .device_id = LWMI_DEVICE_ID_GPU,
+ .feature_id = LWMI_FEATURE_ID_GPU_NV_CPU_BOOST,
+ .type_id = LWMI_TYPE_ID_NONE,
+};
+
struct capdata01_attr_group {
const struct attribute_group *attr_group;
struct tunable_attr_01 *tunable_attr;
.name = _fsname, .attrs = _attrname##_attrs \
}
+/* CPU tunable attributes */
LWMI_ATTR_GROUP_TUNABLE_CAP01(cpu_temp, "cpu_temp",
"Set the CPU thermal load limit");
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_cpu_cl, "ppt_cpu_cl",
LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl_cl, "ppt_pl4_ipl_cl",
"Set the CPU cross loading instantaneous power limit");
+/* GPU tunable attributes */
+LWMI_ATTR_GROUP_TUNABLE_CAP01(dgpu_boost_clk, "dgpu_boost_clk",
+ "Set the dedicated GPU boost clock");
+LWMI_ATTR_GROUP_TUNABLE_CAP01(dgpu_didvid, "dgpu_didvid",
+ "Get the GPU device identifier and vendor identifier");
+LWMI_ATTR_GROUP_TUNABLE_CAP01(dgpu_enable, "dgpu_enable",
+ "Set the dedicated Nvidia GPU enabled status");
+LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_mode, "gpu_mode",
+ "Set the GPU mode by power limit");
+LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_ac_offset, "gpu_nv_ac_offset",
+ "Set the Nvidia GPU AC total processing power baseline offset");
+LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_bpl, "gpu_nv_bpl",
+ "Set the Nvidia GPU base power limit");
+LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_cpu_boost, "gpu_nv_cpu_boost",
+ "Set the Nvidia GPU to CPU dynamic boost limit");
+LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_ctgp, "gpu_nv_ctgp",
+ "Set the GPU configurable total graphics power");
+LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_ppab, "gpu_nv_ppab",
+ "Set the Nvidia GPU power performance aware boost limit");
+LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_temp, "gpu_temp",
+ "Set the GPU thermal load limit");
static struct capdata01_attr_group cd01_attr_groups[] = {
{ &cpu_temp_attr_group, &cpu_temp },
+ { &dgpu_boost_clk_attr_group, &dgpu_boost_clk },
+ { &dgpu_didvid_attr_group, &dgpu_didvid },
+ { &dgpu_enable_attr_group, &dgpu_enable },
+ { &gpu_mode_attr_group, &gpu_mode },
+ { &gpu_nv_ac_offset_attr_group, &gpu_nv_ac_offset },
+ { &gpu_nv_bpl_attr_group, &gpu_nv_bpl },
+ { &gpu_nv_cpu_boost_attr_group, &gpu_nv_cpu_boost },
+ { &gpu_nv_ctgp_attr_group, &gpu_nv_ctgp },
+ { &gpu_nv_ppab_attr_group, &gpu_nv_ppab },
+ { &gpu_temp_attr_group, &gpu_temp },
{ &ppt_cpu_cl_attr_group, &ppt_cpu_cl },
{ &ppt_pl1_apu_spl_attr_group, &ppt_pl1_apu_spl },
{ &ppt_pl1_spl_attr_group, &ppt_pl1_spl },