--- /dev/null
+From 15e7e5c1ebf556cd620c9b091e121091ac760f6d Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Wed, 5 Jun 2013 11:27:26 +0100
+Subject: ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lock
+
+From: Will Deacon <will.deacon@arm.com>
+
+commit 15e7e5c1ebf556cd620c9b091e121091ac760f6d upstream.
+
+An exclusive store instruction may fail for reasons other than lock
+contention (e.g. a cache eviction during the critical section) so, in
+line with other architectures using similar exclusive instructions
+(alpha, mips, powerpc), retry the trylock operation if the lock appears
+to be free but the strex reported failure.
+
+Reported-by: Tony Thompson <anthony.thompson@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Cc: Li Zefan <lizefan@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/include/asm/spinlock.h | 23 +++++++++++++----------
+ 1 file changed, 13 insertions(+), 10 deletions(-)
+
+--- a/arch/arm/include/asm/spinlock.h
++++ b/arch/arm/include/asm/spinlock.h
+@@ -97,19 +97,22 @@ static inline void arch_spin_lock(arch_s
+
+ static inline int arch_spin_trylock(arch_spinlock_t *lock)
+ {
+- unsigned long tmp;
++ unsigned long contended, res;
+ u32 slock;
+
+- __asm__ __volatile__(
+-" ldrex %0, [%2]\n"
+-" subs %1, %0, %0, ror #16\n"
+-" addeq %0, %0, %3\n"
+-" strexeq %1, %0, [%2]"
+- : "=&r" (slock), "=&r" (tmp)
+- : "r" (&lock->slock), "I" (1 << TICKET_SHIFT)
+- : "cc");
++ do {
++ __asm__ __volatile__(
++ " ldrex %0, [%3]\n"
++ " mov %2, #0\n"
++ " subs %1, %0, %0, ror #16\n"
++ " addeq %0, %0, %4\n"
++ " strexeq %2, %0, [%3]"
++ : "=&r" (slock), "=&r" (contended), "=r" (res)
++ : "r" (&lock->slock), "I" (1 << TICKET_SHIFT)
++ : "cc");
++ } while (res);
+
+- if (tmp == 0) {
++ if (!contended) {
+ smp_mb();
+ return 1;
+ } else {
--- /dev/null
+From 00efaa0250939dc148e2d3104fb3c18395d24a2d Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Mon, 12 Aug 2013 18:04:05 +0100
+Subject: ARM: 7812/1: rwlocks: retry trylock operation if strex fails on free lock
+
+From: Will Deacon <will.deacon@arm.com>
+
+commit 00efaa0250939dc148e2d3104fb3c18395d24a2d upstream.
+
+Commit 15e7e5c1ebf5 ("ARM: 7749/1: spinlock: retry trylock operation if
+strex fails on free lock") modifying our arch_spin_trylock to retry the
+acquisition if the lock appeared uncontended, but the strex failed.
+
+This patch does the same for rwlocks, which were missed by the original
+patch.
+
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Cc: Li Zefan <lizefan@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/include/asm/spinlock.h | 49 ++++++++++++++++++++++++----------------
+ 1 file changed, 30 insertions(+), 19 deletions(-)
+
+--- a/arch/arm/include/asm/spinlock.h
++++ b/arch/arm/include/asm/spinlock.h
+@@ -168,17 +168,20 @@ static inline void arch_write_lock(arch_
+
+ static inline int arch_write_trylock(arch_rwlock_t *rw)
+ {
+- unsigned long tmp;
++ unsigned long contended, res;
+
+- __asm__ __volatile__(
+-" ldrex %0, [%1]\n"
+-" teq %0, #0\n"
+-" strexeq %0, %2, [%1]"
+- : "=&r" (tmp)
+- : "r" (&rw->lock), "r" (0x80000000)
+- : "cc");
++ do {
++ __asm__ __volatile__(
++ " ldrex %0, [%2]\n"
++ " mov %1, #0\n"
++ " teq %0, #0\n"
++ " strexeq %1, %3, [%2]"
++ : "=&r" (contended), "=&r" (res)
++ : "r" (&rw->lock), "r" (0x80000000)
++ : "cc");
++ } while (res);
+
+- if (tmp == 0) {
++ if (!contended) {
+ smp_mb();
+ return 1;
+ } else {
+@@ -254,18 +257,26 @@ static inline void arch_read_unlock(arch
+
+ static inline int arch_read_trylock(arch_rwlock_t *rw)
+ {
+- unsigned long tmp, tmp2 = 1;
++ unsigned long contended, res;
+
+- __asm__ __volatile__(
+-" ldrex %0, [%2]\n"
+-" adds %0, %0, #1\n"
+-" strexpl %1, %0, [%2]\n"
+- : "=&r" (tmp), "+r" (tmp2)
+- : "r" (&rw->lock)
+- : "cc");
++ do {
++ __asm__ __volatile__(
++ " ldrex %0, [%2]\n"
++ " mov %1, #0\n"
++ " adds %0, %0, #1\n"
++ " strexpl %1, %0, [%2]"
++ : "=&r" (contended), "=&r" (res)
++ : "r" (&rw->lock)
++ : "cc");
++ } while (res);
+
+- smp_mb();
+- return tmp2 == 0;
++ /* If the lock is negative, then it is already held for write. */
++ if (contended < 0x80000000) {
++ smp_mb();
++ return 1;
++ } else {
++ return 0;
++ }
+ }
+
+ /* read_can_lock - would read_trylock() succeed? */
--- /dev/null
+From 8859685785bfafadf9bc922dd3a2278e59886947 Mon Sep 17 00:00:00 2001
+From: Stephen Warren <swarren@nvidia.com>
+Date: Tue, 18 Feb 2014 16:51:58 -0700
+Subject: ARM: tegra: only run PL310 init on systems with one
+
+From: Stephen Warren <swarren@nvidia.com>
+
+commit 8859685785bfafadf9bc922dd3a2278e59886947 upstream.
+
+Fix tegra_init_cache() to check whether the system has a PL310 cache
+before touching the PL310 registers. This prevents access to non-existent
+registers on Tegra114 and later.
+
+Note for stable kernels:
+In <= v3.12, the file to patch is arch/arm/mach-tegra/common.c.
+
+Signed-off-by: Stephen Warren <swarren@nvidia.com>
+Signed-off-by: Olof Johansson <olof@lixom.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mach-tegra/common.c | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/arch/arm/mach-tegra/common.c
++++ b/arch/arm/mach-tegra/common.c
+@@ -22,6 +22,7 @@
+ #include <linux/io.h>
+ #include <linux/clk.h>
+ #include <linux/delay.h>
++#include <linux/of.h>
+ #include <linux/irqchip.h>
+ #include <linux/clk/tegra.h>
+
+@@ -80,10 +81,20 @@ void tegra_assert_system_reset(char mode
+ static void __init tegra_init_cache(void)
+ {
+ #ifdef CONFIG_CACHE_L2X0
++ static const struct of_device_id pl310_ids[] __initconst = {
++ { .compatible = "arm,pl310-cache", },
++ {}
++ };
++
++ struct device_node *np;
+ int ret;
+ void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
+ u32 aux_ctrl, cache_type;
+
++ np = of_find_matching_node(NULL, pl310_ids);
++ if (!np)
++ return;
++
+ cache_type = readl(p + L2X0_CACHE_TYPE);
+ aux_ctrl = (cache_type & 0x700) << (17-8);
+ aux_ctrl |= 0x7C400001;
--- /dev/null
+From e306dfd06fcb44d21c80acb8e5a88d55f3d1cf63 Mon Sep 17 00:00:00 2001
+From: Olof Johansson <olof@lixom.net>
+Date: Fri, 14 Feb 2014 19:35:15 +0000
+Subject: ARM64: unwind: Fix PC calculation
+
+From: Olof Johansson <olof@lixom.net>
+
+commit e306dfd06fcb44d21c80acb8e5a88d55f3d1cf63 upstream.
+
+The frame PC value in the unwind code used to just take the saved LR
+value and use that. That's incorrect as a stack trace, since it shows
+the return path stack, not the call path stack.
+
+In particular, it shows faulty information in case the bl is done as
+the very last instruction of one label, since the return point will be
+in the next label. That can easily be seen with tail calls to panic(),
+which is marked __noreturn and thus doesn't have anything useful after it.
+
+Easiest here is to just correct the unwind code and do a -4, to get the
+actual call site for the backtrace instead of the return site.
+
+Signed-off-by: Olof Johansson <olof@lixom.net>
+Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/kernel/stacktrace.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/kernel/stacktrace.c
++++ b/arch/arm64/kernel/stacktrace.c
+@@ -48,7 +48,11 @@ int unwind_frame(struct stackframe *fram
+
+ frame->sp = fp + 0x10;
+ frame->fp = *(unsigned long *)(fp);
+- frame->pc = *(unsigned long *)(fp + 8);
++ /*
++ * -4 here because we care about the PC at time of bl,
++ * not where the return will go.
++ */
++ frame->pc = *(unsigned long *)(fp + 8) - 4;
+
+ return 0;
+ }
--- /dev/null
+From c4204960e9d0ba99459dbf1db918f99a45e7a62a Mon Sep 17 00:00:00 2001
+From: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
+Date: Tue, 18 Feb 2014 15:22:12 +0000
+Subject: Input - arizona-haptics: Fix double lock of dapm_mutex
+
+From: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
+
+commit c4204960e9d0ba99459dbf1db918f99a45e7a62a upstream.
+
+snd_soc_dapm_sync takes the dapm_mutex internally, but we currently take
+it externally as well. This patch fixes this.
+
+Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/input/misc/arizona-haptics.c | 11 ++++-------
+ 1 file changed, 4 insertions(+), 7 deletions(-)
+
+--- a/drivers/input/misc/arizona-haptics.c
++++ b/drivers/input/misc/arizona-haptics.c
+@@ -77,16 +77,14 @@ static void arizona_haptics_work(struct
+ return;
+ }
+
++ mutex_unlock(dapm_mutex);
++
+ ret = snd_soc_dapm_sync(arizona->dapm);
+ if (ret != 0) {
+ dev_err(arizona->dev, "Failed to sync DAPM: %d\n",
+ ret);
+- mutex_unlock(dapm_mutex);
+ return;
+ }
+-
+- mutex_unlock(dapm_mutex);
+-
+ } else {
+ /* This disable sequence will be a noop if already enabled */
+ mutex_lock_nested(dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME);
+@@ -99,16 +97,15 @@ static void arizona_haptics_work(struct
+ return;
+ }
+
++ mutex_unlock(dapm_mutex);
++
+ ret = snd_soc_dapm_sync(arizona->dapm);
+ if (ret != 0) {
+ dev_err(arizona->dev, "Failed to sync DAPM: %d\n",
+ ret);
+- mutex_unlock(dapm_mutex);
+ return;
+ }
+
+- mutex_unlock(dapm_mutex);
+-
+ ret = regmap_update_bits(arizona->regmap,
+ ARIZONA_HAPTICS_CONTROL_1,
+ ARIZONA_HAP_CTRL_MASK,
--- /dev/null
+From f229006ec6beabf7b844653d92fa61f025fe3dcf Mon Sep 17 00:00:00 2001
+From: James Hogan <james.hogan@imgtec.com>
+Date: Tue, 25 Feb 2014 22:05:35 +0000
+Subject: irq-metag*: stop set_affinity vectoring to offline cpus
+
+From: James Hogan <james.hogan@imgtec.com>
+
+commit f229006ec6beabf7b844653d92fa61f025fe3dcf upstream.
+
+Fix irq_set_affinity callbacks in the Meta IRQ chip drivers to AND
+cpu_online_mask into the cpumask when picking a CPU to vector the
+interrupt to.
+
+As Thomas pointed out, the /proc/irq/$N/smp_affinity interface doesn't
+filter out offline CPUs, so without this patch if you offline CPU0 and
+set an IRQ affinity to 0x3 it vectors the interrupt onto CPU0 even
+though it is offline.
+
+Reported-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: James Hogan <james.hogan@imgtec.com>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: linux-metag@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/irqchip/irq-metag-ext.c | 2 +-
+ drivers/irqchip/irq-metag.c | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/irqchip/irq-metag-ext.c
++++ b/drivers/irqchip/irq-metag-ext.c
+@@ -515,7 +515,7 @@ static int meta_intc_set_affinity(struct
+ * one cpu (the interrupt code doesn't support it), so we just
+ * pick the first cpu we find in 'cpumask'.
+ */
+- cpu = cpumask_any(cpumask);
++ cpu = cpumask_any_and(cpumask, cpu_online_mask);
+ thread = cpu_2_hwthread_id[cpu];
+
+ metag_out32(TBI_TRIG_VEC(TBID_SIGNUM_TR2(thread)), vec_addr);
+--- a/drivers/irqchip/irq-metag.c
++++ b/drivers/irqchip/irq-metag.c
+@@ -201,7 +201,7 @@ static int metag_internal_irq_set_affini
+ * one cpu (the interrupt code doesn't support it), so we just
+ * pick the first cpu we find in 'cpumask'.
+ */
+- cpu = cpumask_any(cpumask);
++ cpu = cpumask_any_and(cpumask, cpu_online_mask);
+ thread = cpu_2_hwthread_id[cpu];
+
+ metag_out32(TBI_TRIG_VEC(TBID_SIGNUM_TR1(thread)),
selinux-bigendian-problems-with-filename-trans-rules.patch
quota-fix-race-between-dqput-and-dquot_scan_active.patch
ipc-mqueue-remove-limits-for-the-amount-of-system-wide.patch
+input-arizona-haptics-fix-double-lock-of-dapm_mutex.patch
+irq-metag-stop-set_affinity-vectoring-to-offline-cpus.patch
+arm64-unwind-fix-pc-calculation.patch
+arm-tegra-only-run-pl310-init-on-systems-with-one.patch
+arm-7749-1-spinlock-retry-trylock-operation-if-strex-fails-on-free-lock.patch
+arm-7812-1-rwlocks-retry-trylock-operation-if-strex-fails-on-free-lock.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
