--- /dev/null
+From 9990a882ec3cb26b4f9dc15febb769c34846e2a8 Mon Sep 17 00:00:00 2001
+From: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
+Date: Fri, 12 Oct 2012 14:07:24 +0530
+Subject: ath9k: fill channel mode in caldata
+
+From: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
+
+commit 77d848372875d2e4cbdbf07030f0e08cab5e7f4d upstream.
+
+It is useful to have channel mode in caldata to find out
+whether operaing channel is in HT40/20 when we are currently
+on offchannel. It will be used by BTCOEX to enable/disable
+concurrent tx mechanism later.
+
+Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+Cc: Jianguo Wu <wujianguo@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/calib.c | 1 +
+ drivers/net/wireless/ath/ath9k/hw.h | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/drivers/net/wireless/ath/ath9k/calib.c
++++ b/drivers/net/wireless/ath/ath9k/calib.c
+@@ -410,6 +410,7 @@ void ath9k_init_nfcal_hist_buffer(struct
+
+ ah->caldata->channel = chan->channel;
+ ah->caldata->channelFlags = chan->channelFlags & ~CHANNEL_CW_INT;
++ ah->caldata->chanmode = chan->chanmode;
+ h = ah->caldata->nfCalHist;
+ default_nf = ath9k_hw_get_default_nf(ah, chan);
+ for (i = 0; i < NUM_NF_READINGS; i++) {
+--- a/drivers/net/wireless/ath/ath9k/hw.h
++++ b/drivers/net/wireless/ath/ath9k/hw.h
+@@ -361,6 +361,7 @@ struct ath9k_rtt_hist {
+ struct ath9k_hw_cal_data {
+ u16 channel;
+ u32 channelFlags;
++ u32 chanmode;
+ int32_t CalValid;
+ int8_t iCoff;
+ int8_t qCoff;
--- /dev/null
+From df8c1e2ba1f2f31f6ed28ba3cc4c14a69358404c Mon Sep 17 00:00:00 2001
+From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Mon, 10 Jun 2013 13:49:39 +0530
+Subject: ath9k: Fix noisefloor calibration
+
+From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+
+commit 696df78509d1f81b651dd98ecdc1aecab616db6b upstream.
+
+The commits,
+
+"ath9k: Fix regression in channelwidth switch at the same channel"
+"ath9k: Fix invalid noisefloor reading due to channel update"
+
+attempted to fix noisefloor calibration when a channel switch
+happens due to HT20/HT40 bandwidth change. This is causing invalid
+readings resulting in messages like:
+
+"ath: phy16: NF[0] (-45) > MAX (-95), correcting to MAX".
+
+This results in an incorrect noise being used initially for reporting
+the signal level of received packets, until NF calibration is done
+and the history buffer is updated via the ANI timer, which happens
+much later.
+
+When a bandwidth change happens, it is appropriate to reset
+the internal history data for the channel. Do this correctly in the
+reset() routine by checking the "chanmode" variable.
+
+Cc: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
+Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+[bwh: Backported to 3.2: adjust context, indentation]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+Cc: Jianguo Wu <wujianguo@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/hw.c | 3 ++-
+ drivers/net/wireless/ath/ath9k/main.c | 7 -------
+ 2 files changed, 2 insertions(+), 8 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -1628,7 +1628,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+ if (caldata &&
+ (chan->channel != caldata->channel ||
+ (chan->channelFlags & ~CHANNEL_CW_INT) !=
+- (caldata->channelFlags & ~CHANNEL_CW_INT))) {
++ (caldata->channelFlags & ~CHANNEL_CW_INT) ||
++ chan->chanmode != caldata->chanmode)) {
+ /* Operating channel changed, reset channel calibration data */
+ memset(caldata, 0, sizeof(*caldata));
+ ath9k_init_nfcal_hist_buffer(ah, chan);
+--- a/drivers/net/wireless/ath/ath9k/main.c
++++ b/drivers/net/wireless/ath/ath9k/main.c
+@@ -1614,13 +1614,6 @@ static int ath9k_config(struct ieee80211
+ ath_update_survey_stats(sc);
+ spin_unlock_irqrestore(&common->cc_lock, flags);
+
+- /*
+- * Preserve the current channel values, before updating
+- * the same channel
+- */
+- if (ah->curchan && (old_pos == pos))
+- ath9k_hw_getnf(ah, ah->curchan);
+-
+ ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
+ curchan, conf->channel_type);
+
--- /dev/null
+From deca5de87684d4cc84302dc4460c980ed44ac7a0 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <nbd@openwrt.org>
+Date: Fri, 22 Feb 2013 21:37:25 +0100
+Subject: ath9k_htc: fix signal strength handling issues
+
+From: Felix Fietkau <nbd@openwrt.org>
+
+commit 838f427955dcfd16858b0108ce29029da0d56a4e upstream.
+
+The ath9k commit 2ef167557c0a26c88162ecffb017bfcc51eb7b29
+(ath9k: fix signal strength reporting issues) fixed an issue where the
+reported per-frame signal strength reported to mac80211 was being
+overwritten with an internal average. The same issue is also present
+in ath9k_htc.
+In addition to preventing the driver from overwriting the value, this
+commit also ensures that the internal average (which is used for ANI)
+only tracks beacons of the AP that we're connected to.
+
+Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+[bwh: Backported to 3.2: use compare_ether_addr() instead of
+ ether_addr_equal(), with opposite sense]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+Cc: Jianguo Wu <wujianguo@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/htc.h | 1 +
+ drivers/net/wireless/ath/ath9k/htc_drv_txrx.c | 18 +++++++++++-------
+ 2 files changed, 12 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath9k/htc.h
++++ b/drivers/net/wireless/ath/ath9k/htc.h
+@@ -22,6 +22,7 @@
+ #include <linux/firmware.h>
+ #include <linux/skbuff.h>
+ #include <linux/netdevice.h>
++#include <linux/etherdevice.h>
+ #include <linux/leds.h>
+ #include <linux/slab.h>
+ #include <net/mac80211.h>
+--- a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
++++ b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
+@@ -1077,15 +1077,19 @@ static bool ath9k_rx_prepare(struct ath9
+
+ last_rssi = priv->rx.last_rssi;
+
+- if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
+- rxbuf->rxstatus.rs_rssi = ATH_EP_RND(last_rssi,
+- ATH_RSSI_EP_MULTIPLIER);
++ if (ieee80211_is_beacon(hdr->frame_control) &&
++ !is_zero_ether_addr(common->curbssid) &&
++ compare_ether_addr(hdr->addr3, common->curbssid) == 0) {
++ s8 rssi = rxbuf->rxstatus.rs_rssi;
+
+- if (rxbuf->rxstatus.rs_rssi < 0)
+- rxbuf->rxstatus.rs_rssi = 0;
++ if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
++ rssi = ATH_EP_RND(last_rssi, ATH_RSSI_EP_MULTIPLIER);
+
+- if (ieee80211_is_beacon(fc))
+- priv->ah->stats.avgbrssi = rxbuf->rxstatus.rs_rssi;
++ if (rssi < 0)
++ rssi = 0;
++
++ priv->ah->stats.avgbrssi = rssi;
++ }
+
+ rx_status->mactime = be64_to_cpu(rxbuf->rxstatus.rs_tstamp);
+ rx_status->band = hw->conf.channel->band;
--- /dev/null
+From 041aacd868cda63b3218d055888d1af635126949 Mon Sep 17 00:00:00 2001
+From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Mon, 10 Jun 2013 13:49:38 +0530
+Subject: ath9k_hw: Assign default xlna config for AR9485
+
+From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+
+commit 30d5b709da23f4ab9836c7f66d2d2e780a69cf12 upstream.
+
+For AR9485 boards with XLNA, the default gpio config
+is not set correctly, fix this.
+
+Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+[bwh: Backported to 3.2: adjust context]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+Cc: Jianguo Wu <wujianguo@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 8 ++++++--
+ drivers/net/wireless/ath/ath9k/ar9003_phy.h | 2 ++
+ 2 files changed, 8 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+@@ -3592,7 +3592,7 @@ static u16 ar9003_hw_ant_ctrl_chain_get(
+ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
+ {
+ int chain;
+- u32 regval;
++ u32 regval, value;
+ u32 ant_div_ctl1;
+ static const u32 switch_chain_reg[AR9300_MAX_CHAINS] = {
+ AR_PHY_SWITCH_CHAIN_0,
+@@ -3600,7 +3600,11 @@ static void ar9003_hw_ant_ctrl_apply(str
+ AR_PHY_SWITCH_CHAIN_2,
+ };
+
+- u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
++ if (AR_SREV_9485(ah) && (ar9003_hw_get_rx_gain_idx(ah) == 0))
++ ath9k_hw_cfg_output(ah, AR9300_EXT_LNA_CTL_GPIO_AR9485,
++ AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED);
++
++ value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
+
+ if (AR_SREV_9462(ah)) {
+ REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+@@ -339,6 +339,8 @@
+
+ #define AR_PHY_CCA_NOM_VAL_9330_2GHZ -118
+
++#define AR9300_EXT_LNA_CTL_GPIO_AR9485 9
++
+ /*
+ * AGC Field Definitions
+ */
--- /dev/null
+From 247a0b330ef3bb2e642d4bec5c04aee589733a4a Mon Sep 17 00:00:00 2001
+From: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
+Date: Thu, 25 Oct 2012 17:11:31 +0530
+Subject: ath9k_hw: Enable hw PLL power save for AR9462
+
+From: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
+
+commit 1680260226a8fd2aab590319da83ad8e610da9bd upstream.
+
+This reduced the power consumption to half in full and network sleep.
+
+Cc: Paul Stewart <pstew@chromium.org>
+Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+[bwh: Backported to 3.2:
+ - INIT_INI_ARRAY macro requires an explicit size argument
+ - Remove the now-redundant macro PCIE_PLL_ON_CREQ_DIS_L1_2P0]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+Cc: Jianguo Wu <wujianguo@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/ar9003_hw.c | 11 ++++-------
+ 1 file changed, 4 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+@@ -33,9 +33,6 @@
+ */
+ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
+ {
+-#define PCIE_PLL_ON_CREQ_DIS_L1_2P0 \
+- ar9462_pciephy_pll_on_clkreq_disable_L1_2p0
+-
+ #define AR9462_BB_CTX_COEFJ(x) \
+ ar9462_##x##_baseband_core_txfir_coeff_japan_2484
+
+@@ -312,13 +309,13 @@ static void ar9003_hw_init_mode_regs(str
+
+ /* Awake -> Sleep Setting */
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- PCIE_PLL_ON_CREQ_DIS_L1_2P0,
+- ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
++ ar9462_pciephy_clkreq_disable_L1_2p0,
++ ARRAY_SIZE(ar9462_pciephy_clkreq_disable_L1_2p0),
+ 2);
+ /* Sleep -> Awake Setting */
+ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+- PCIE_PLL_ON_CREQ_DIS_L1_2P0,
+- ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
++ ar9462_pciephy_clkreq_disable_L1_2p0,
++ ARRAY_SIZE(ar9462_pciephy_clkreq_disable_L1_2p0),
+ 2);
+
+ /* Fast clock modal settings */
--- /dev/null
+From 959f049dfb62b517cbb3dd48ed2fb7d9c713ce16 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <nbd@openwrt.org>
+Date: Sun, 20 Jan 2013 21:55:21 +0100
+Subject: ath9k_hw: fix chain swap setting when setting rx chainmask to 5
+
+From: Felix Fietkau <nbd@openwrt.org>
+
+commit 959f049dfb62b517cbb3dd48ed2fb7d9c713ce16 upstream.
+
+commit 24171dd92096fc370b195f3f6bdc0798855dc3f9 upstream.
+
+Chain swapping should only be enabled when the EEPROM chainmask is set to 5,
+regardless of what the runtime chainmask is.
+
+Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+[bwh: Backported to 3.2: keep the special case for AR_SREV_9462 here]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+Cc: Jianguo Wu <wujianguo@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/ar9003_phy.c | 27 +++++++--------------------
+ 1 file changed, 7 insertions(+), 20 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+@@ -545,33 +545,20 @@ static void ar9003_hw_init_bb(struct ath
+
+ void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
+ {
+- switch (rx) {
+- case 0x5:
++ if (ah->caps.tx_chainmask == 5 || ah->caps.rx_chainmask == 5)
+ REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
+ AR_PHY_SWAP_ALT_CHAIN);
+- case 0x3:
+- case 0x1:
+- case 0x2:
+- case 0x7:
+- REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
+- REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
+- break;
+- default:
+- break;
+- }
++
++ REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
++ REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
+
+ if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7))
+- REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
++ tx = 3;
+ else if (AR_SREV_9462(ah))
+ /* xxx only when MCI support is enabled */
+- REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
+- else
+- REG_WRITE(ah, AR_SELFGEN_MASK, tx);
++ tx = 3;
+
+- if (tx == 0x5) {
+- REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
+- AR_PHY_SWAP_ALT_CHAIN);
+- }
++ REG_WRITE(ah, AR_SELFGEN_MASK, tx);
+ }
+
+ /*
--- /dev/null
+From 7c6c7b3f34d143e71c800c5e95e65a2c838eade6 Mon Sep 17 00:00:00 2001
+From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Wed, 26 Dec 2012 12:27:39 +0530
+Subject: ath9k_hw: Fix RX gain initvals for AR9485
+
+From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+
+commit a796a1dd5da9645ad77aa687d1a890ecd63ab5a6 upstream.
+
+Populate iniModesRxGain with the correct initvals
+array for AR9485 v1.1
+
+Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+[bwh: Backported to 3.2:
+ - Adjust context
+ - INIT_INI_ARRAY takes additional size and columns arguments]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+Cc: Jianguo Wu <wujianguo@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/ath9k/ar9003_hw.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+@@ -637,8 +637,8 @@ static void ar9003_rx_gain_table_mode0(s
+ 2);
+ else if (AR_SREV_9485_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9485Common_wo_xlna_rx_gain_1_1,
+- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
++ ar9485_common_rx_gain_1_1,
++ ARRAY_SIZE(ar9485_common_rx_gain_1_1),
+ 2);
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
arm-orion-set-eth-packet-size-csum-offload-limit.patch
arm-7628-1-head.s-map-one-extra-section-for-the-atag-dtb-area.patch
arm-7791-1-a.out-remove-partial-a.out-support.patch
+ath9k-fix-noisefloor-calibration.patch
+ath9k-fill-channel-mode-in-caldata.patch
+ath9k_hw-assign-default-xlna-config-for-ar9485.patch
+ath9k_htc-fix-signal-strength-handling-issues.patch
+ath9k_hw-fix-chain-swap-setting-when-setting-rx-chainmask-to-5.patch
+ath9k_hw-fix-rx-gain-initvals-for-ar9485.patch
+ath9k_hw-enable-hw-pll-power-save-for-ar9462.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
