+2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com>
+
+ * tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset.
+
2014-08-06 Vladimir Makarov <vmakarov@redhat.com>
PR debug/61923
+2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com>
+
+ * gcc.target/arm/get_address_cost_aligned_max_offset.c: New test.
+
2014-08-06 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/43906
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-mthumb -O2" } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+
+unsigned int
+test (const short p16[6 * 64])
+{
+ unsigned int i = 6;
+ unsigned int ret = 0;
+
+ do
+ {
+ unsigned long long *p64 = (unsigned long long*) p16;
+ unsigned int *p32 = (unsigned int*) p16;
+ ret += ret;
+ if (p16[1] || p32[1])
+ ret++;
+ else if (p64[1] | p64[2] | p64[3])
+ ret++;
+ p16 += 64;
+ i--;
+ } while (i != 0);
+
+ return ret;
+}
+
+/* { dg-final { scan-assembler-not "#22" } } */
+/* { dg-final { scan-assembler-not "#14" } } */
XEXP (addr, 1) = gen_int_mode (off, address_mode);
if (memory_address_addr_space_p (mem_mode, addr, as))
break;
+ /* For some TARGET, like ARM THUMB1, the offset should be nature
+ aligned. Try an aligned offset if address_mode is not QImode. */
+ off = (address_mode == QImode)
+ ? 0
+ : ((unsigned HOST_WIDE_INT) 1 << i)
+ - GET_MODE_SIZE (address_mode);
+ if (off > 0)
+ {
+ XEXP (addr, 1) = gen_int_mode (off, address_mode);
+ if (memory_address_addr_space_p (mem_mode, addr, as))
+ break;
+ }
}
if (i == -1)
off = 0;