riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs

The StarFive JH7100 SoC has non-coherent device DMAs, so mark the
soc bus as such.

Link: https://github.com/starfive-tech/JH7100_Docs/blob/main/JH7100%20Cache%20Coherence%20V1.0.pdf
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index a40a8544b8603705ee1beb25e60341cc76b6f3e4..7c1009428c1fe49c69224d28d967a457a712f5f0 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -144,6 +144,7 @@
                interrupt-parent = <&plic>;
                #address-cells = <2>;
                #size-cells = <2>;
+               dma-noncoherent;
                ranges;
 
                clint: clint@2000000 {