drm/amd/pm/ci: Fill DW8 fields from SMC

In ci_populate_dw8() we currently just read a value from the SMU
and then throw it away. Instead of throwing away the value,
we should use it to fill other fields in DW8 (like radeon).

Otherwise the value of the other fiels is just cleared when
we copy this data to the SMU later.

Fixes: 9f4b35411cfe ("drm/amd/powerplay: add CI asics support to smumgr (v3)")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
index fa21a04fd7f06b397b0ec10d43102dc02a2db9cc..731355bdb9bc302e8efddfb04f9fac2f6fd5a01e 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
@@ -543,12 +543,11 @@ static int ci_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset)
 {
        struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
        const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults;
-       uint32_t temp;
 
        if (ci_read_smc_sram_dword(hwmgr,
                        fuse_table_offset +
                        offsetof(SMU7_Discrete_PmFuses, TdcWaterfallCtl),
-                       (uint32_t *)&temp, SMC_RAM_END))
+                       (uint32_t *)&smu_data->power_tune_table.TdcWaterfallCtl, SMC_RAM_END))
                PP_ASSERT_WITH_CODE(false,
                                "Attempt to read PmFuses.DW6 (SviLoadLineEn) from SMC Failed!",
                                return -EINVAL);