arm64: dts: qcom: monaco-evk: Add sound card

Add the sound card for monaco-evk board and verified playback
functionality using the max98357a I2S speaker amplifier and I2S
microphones. The max98357a speaker amplifier is connected via
High-Speed MI2S HS0 interface, while the microphones utilize the
Secondary MI2S interface and also enable required pin controller
gpios for audio.

Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250905192350.1223812-5-umang.chheda@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts
index 93e9e5322a390ac148ed3bb3e3944a024529fa58..f3c5d363921e324f53cf55a0e8427a7f1e903bd6 100644 (file)
--- a/arch/arm64/boot/dts/qcom/monaco-evk.dts
+++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/sound/qcom,q6afe.h>
 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 
 #include "qcs8300.dtsi"
@@ -24,6 +25,57 @@
        chosen {
                stdout-path = "serial0:115200n8";
        };
+
+       dmic: audio-codec-0 {
+               compatible = "dmic-codec";
+               #sound-dai-cells = <0>;
+               num-channels = <1>;
+       };
+
+       max98357a: audio-codec-1 {
+               compatible = "maxim,max98357a";
+               #sound-dai-cells = <0>;
+       };
+
+       sound {
+               compatible = "qcom,qcs8275-sndcard";
+               model = "MONACO-EVK";
+
+               pinctrl-0 = <&hs0_mi2s_active>, <&mi2s1_active>;
+               pinctrl-names = "default";
+
+               hs0-mi2s-playback-dai-link {
+                       link-name = "HS0 MI2S Playback";
+
+                       codec {
+                               sound-dai = <&max98357a>;
+                       };
+
+                       cpu {
+                               sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>;
+                       };
+
+                       platform {
+                               sound-dai = <&q6apm>;
+                       };
+               };
+
+               sec-mi2s-capture-dai-link {
+                       link-name = "Secondary MI2S Capture";
+
+                       codec {
+                               sound-dai = <&dmic>;
+                       };
+
+                       cpu {
+                               sound-dai = <&q6apmbedai SECONDARY_MI2S_TX>;
+                       };
+
+                       platform {
+                               sound-dai = <&q6apm>;
+                       };
+               };
+       };
 };
 
 &apps_rsc {

diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 8ae843567ea4128abbd5887cfc89178521358c08..8afd77a2d737e0db4b7206ab57a1e93c255fc2c5 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -4804,6 +4804,43 @@
                        #interrupt-cells = <2>;
                        wakeup-parent = <&pdc>;
 
+                       hs0_mi2s_active: hs0-mi2s-active-state {
+                               pins = "gpio106", "gpio107", "gpio108", "gpio109";
+                               function = "hs0_mi2s";
+                               drive-strength = <8>;
+                               bias-disable;
+                       };
+
+                       mi2s1_active: mi2s1-active-state {
+                               data0-pins {
+                                       pins = "gpio100";
+                                       function = "mi2s1_data0";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                               };
+
+                               data1-pins {
+                                       pins = "gpio101";
+                                       function = "mi2s1_data1";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                               };
+
+                               sclk-pins {
+                                       pins = "gpio98";
+                                       function = "mi2s1_sck";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                               };
+
+                               ws-pins {
+                                       pins = "gpio99";
+                                       function = "mi2s1_ws";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                               };
+                       };
+
                        qup_i2c0_data_clk: qup-i2c0-data-clk-state {
                                pins = "gpio17", "gpio18";
                                function = "qup0_se0";