]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
net/mlx5: Add PPHCR to PCAM supported registers mask
authorAlexei Lazar <alazar@nvidia.com>
Wed, 22 Oct 2025 12:29:39 +0000 (15:29 +0300)
committerJakub Kicinski <kuba@kernel.org>
Thu, 23 Oct 2025 14:14:32 +0000 (07:14 -0700)
Add the PPHCR bit to the port_access_reg_cap_mask field of PCAM
register to indicate that the device supports the PPHCR register
and the RS-FEC histogram feature.

Signed-off-by: Alexei Lazar <alazar@nvidia.com>
Reviewed-by: Yael Chemla <ychemla@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1761136182-918470-2-git-send-email-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
include/linux/mlx5/mlx5_ifc.h

index 07614cd95beda427ba3f34f1c26544a616d78c1f..1b0b36aa2a767a686a103b2c78158321202aedc8 100644 (file)
@@ -10833,7 +10833,9 @@ struct mlx5_ifc_pcam_regs_5000_to_507f_bits {
        u8         port_access_reg_cap_mask_127_to_96[0x20];
        u8         port_access_reg_cap_mask_95_to_64[0x20];
 
-       u8         port_access_reg_cap_mask_63_to_36[0x1c];
+       u8         port_access_reg_cap_mask_63[0x1];
+       u8         pphcr[0x1];
+       u8         port_access_reg_cap_mask_61_to_36[0x1a];
        u8         pplm[0x1];
        u8         port_access_reg_cap_mask_34_to_32[0x3];