5.10-stable patches

added patches:
	mtd-rawnand-arasan-prevent-an-unsupported-configuration.patch

diff --git a/queue-5.10/mtd-rawnand-arasan-prevent-an-unsupported-configuration.patch b/queue-5.10/mtd-rawnand-arasan-prevent-an-unsupported-configuration.patch
new file mode 100644 (file)
index 0000000..106786b
--- /dev/null
+++ b/queue-5.10/mtd-rawnand-arasan-prevent-an-unsupported-configuration.patch
@@ -0,0 +1,53 @@
+From fc9e18f9e987ad46722dad53adab1c12148c213c Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+Date: Fri, 8 Oct 2021 18:36:40 +0200
+Subject: mtd: rawnand: arasan: Prevent an unsupported configuration
+
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+
+commit fc9e18f9e987ad46722dad53adab1c12148c213c upstream.
+
+Under the following conditions:
+* after rounding up by 4 the number of bytes to transfer (this is
+  related to the controller's internal constraints),
+* if this (rounded) amount of data is situated beyond the end of the
+  device,
+* and only in NV-DDR mode,
+the Arasan NAND controller timeouts.
+
+This currently can happen in a particular helper used when picking
+software ECC algorithms. Let's prevent this situation by refusing to use
+the NV-DDR interface with software engines.
+
+Fixes: 4edde6031458 ("mtd: rawnand: arasan: Support NV-DDR interface")
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Link: https://lore.kernel.org/linux-mtd/20211008163640.1753821-1-miquel.raynal@bootlin.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/mtd/nand/raw/arasan-nand-controller.c |   15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/drivers/mtd/nand/raw/arasan-nand-controller.c
++++ b/drivers/mtd/nand/raw/arasan-nand-controller.c
+@@ -891,6 +891,21 @@ static int anfc_setup_interface(struct n
+               nvddr = nand_get_nvddr_timings(conf);
+               if (IS_ERR(nvddr))
+                       return PTR_ERR(nvddr);
++
++              /*
++               * The controller only supports data payload requests which are
++               * a multiple of 4. In practice, most data accesses are 4-byte
++               * aligned and this is not an issue. However, rounding up will
++               * simply be refused by the controller if we reached the end of
++               * the device *and* we are using the NV-DDR interface(!). In
++               * this situation, unaligned data requests ending at the device
++               * boundary will confuse the controller and cannot be performed.
++               *
++               * This is something that happens in nand_read_subpage() when
++               * selecting software ECC support and must be avoided.
++               */
++              if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT)
++                      return -ENOTSUPP;
+       } else {
+               sdr = nand_get_sdr_timings(conf);
+               if (IS_ERR(sdr))

diff --git a/queue-5.10/series b/queue-5.10/series
index 7feb0a4ec64f911dcd834b412b739b9640146e7d..5c8ab7a5753205579e83422399d2b62c4164f713 100644 (file)
--- a/queue-5.10/series
+++ b/queue-5.10/series
@@ -540,3 +540,4 @@ drm-bridge-tc358767-fix-e-dp-bridge-endpoint-parsing-in-dedicated-function.patch
 drm-vc4-change-vc4_dma_range_matches-from-a-global-to-static.patch
 revert-net-usb-ax88179_178a-needs-flag_send_zlp.patch
 bluetooth-l2cap-fix-l2cap_global_chan_by_psm-regression.patch
+mtd-rawnand-arasan-prevent-an-unsupported-configuration.patch