]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
sse.md (<code><mode>3 smaxmin:VI124_128 expander): Use nonimmediate_operand instead...
authorJakub Jelinek <jakub@redhat.com>
Wed, 21 Sep 2011 11:39:23 +0000 (13:39 +0200)
committerJakub Jelinek <jakub@gcc.gnu.org>
Wed, 21 Sep 2011 11:39:23 +0000 (13:39 +0200)
* config/i386/sse.md (<code><mode>3 smaxmin:VI124_128 expander): Use
nonimmediate_operand instead of register_operand predicate for operands
1 and 2, force them into registers if expanding them as comparison.
(<code><mode>3 umaxmin:VI124_128 expander): Similarly.  For UMAX
V8HImode force into register just operand 1.

From-SVN: r179045

gcc/ChangeLog
gcc/config/i386/sse.md

index 036fddeebbb58ddc07b217ad7aa20c5d17fe7a0a..fb80dc938fdcabf6ecbe98e2391827eae536d897 100644 (file)
@@ -1,3 +1,11 @@
+2011-09-21  Jakub Jelinek  <jakub@redhat.com>
+
+       * config/i386/sse.md (<code><mode>3 smaxmin:VI124_128 expander): Use
+       nonimmediate_operand instead of register_operand predicate for operands
+       1 and 2, force them into registers if expanding them as comparison.
+       (<code><mode>3 umaxmin:VI124_128 expander): Similarly.  For UMAX
+       V8HImode force into register just operand 1.
+
 2011-09-21  Georg-Johann Lay  <avr@gjlay.de>
 
        PR target/45099
index 5e1701c858b1ef3dacc71c01ed26e5b6b9991cfb..7c15e1a9a7083672667e604094cbaf6e69ce543c 100644 (file)
 
 (define_expand "<code><mode>3"
   [(set (match_operand:VI124_128 0 "register_operand" "")
-       (smaxmin:VI124_128 (match_operand:VI124_128 1 "register_operand" "")
-                          (match_operand:VI124_128 2 "register_operand" "")))]
+       (smaxmin:VI124_128 (match_operand:VI124_128 1 "nonimmediate_operand" "")
+                          (match_operand:VI124_128 2 "nonimmediate_operand" "")))]
   "TARGET_SSE2"
 {
   if (TARGET_SSE4_1 || <MODE>mode == V8HImode)
       bool ok;
 
       xops[0] = operands[0];
+      operands[1] = force_reg (<MODE>mode, operands[1]);
+      operands[2] = force_reg (<MODE>mode, operands[2]);
 
       if (<CODE> == SMAX)
        {
 
 (define_expand "<code><mode>3"
   [(set (match_operand:VI124_128 0 "register_operand" "")
-       (umaxmin:VI124_128 (match_operand:VI124_128 1 "register_operand" "")
-                          (match_operand:VI124_128 2 "register_operand" "")))]
+       (umaxmin:VI124_128 (match_operand:VI124_128 1 "nonimmediate_operand" "")
+                          (match_operand:VI124_128 2 "nonimmediate_operand" "")))]
   "TARGET_SSE2"
 {
   if (TARGET_SSE4_1 || <MODE>mode == V16QImode)
   else if (<CODE> == UMAX && <MODE>mode == V8HImode)
     {
       rtx op0 = operands[0], op2 = operands[2], op3 = op0;
+      operands[1] = force_reg (<MODE>mode, operands[1]);
       if (rtx_equal_p (op3, op2))
        op3 = gen_reg_rtx (V8HImode);
       emit_insn (gen_sse2_ussubv8hi3 (op3, operands[1], op2));
       rtx xops[6];
       bool ok;
 
+      operands[1] = force_reg (<MODE>mode, operands[1]);
+      operands[2] = force_reg (<MODE>mode, operands[2]);
+
       xops[0] = operands[0];
 
       if (<CODE> == UMAX)