arm64/mm: Directly use TTBRx_EL1_CnP

Replace all TTBR_CNP_BIT macro instances with TTBRx_EL1_CNP_BIT which
is a standard field from tools sysreg format. Drop the now redundant
custom macro TTBR_CNP_BIT. No functional change.

Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Oliver Upton <oupton@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: kvmarm@lists.linux.dev
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index e80712379dd6df1c08d0fd327d3d15ee7d8faf5b..72f31800c7030cfc4ffe80013d153d7c6deef9b6 100644 (file)
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -223,8 +223,6 @@
  */
 #define S1_TABLE_AP            (_AT(pmdval_t, 3) << 61)
 
-#define TTBR_CNP_BIT           (UL(1) << 0)
-
 /*
  * TCR flags.
  */

diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c
index 32148bf09c1dc057c9b39e34e19d14dd49c7904a..eceead1686f2dc6d741d8761110d4b15c2bd844a 100644 (file)
--- a/arch/arm64/kernel/mte.c
+++ b/arch/arm64/kernel/mte.c
@@ -315,8 +315,8 @@ void mte_cpu_setup(void)
         * CnP is not a boot feature so MTE gets enabled before CnP, but let's
         * make sure that is the case.
         */
-       BUG_ON(read_sysreg(ttbr0_el1) & TTBR_CNP_BIT);
-       BUG_ON(read_sysreg(ttbr1_el1) & TTBR_CNP_BIT);
+       BUG_ON(read_sysreg(ttbr0_el1) & TTBRx_EL1_CnP);
+       BUG_ON(read_sysreg(ttbr1_el1) & TTBRx_EL1_CnP);
 
        /* Normal Tagged memory type at the corresponding MAIR index */
        sysreg_clear_set(mair_el1,

diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
index 0d42eedc7167c7390a2b6c4ca89cf9c4db74c15b..445eb0743af213ac57a8bd30a0753746611aadaa 100644 (file)
--- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S
+++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
@@ -130,7 +130,7 @@ SYM_CODE_START_LOCAL(___kvm_hyp_init)
        ldr     x1, [x0, #NVHE_INIT_PGD_PA]
        phys_to_ttbr x2, x1
 alternative_if ARM64_HAS_CNP
-       orr     x2, x2, #TTBR_CNP_BIT
+       orr     x2, x2, #TTBRx_EL1_CnP
 alternative_else_nop_endif
        msr     ttbr0_el2, x2
 
@@ -291,7 +291,7 @@ SYM_TYPED_FUNC_START(__pkvm_init_switch_pgd)
        /* Install the new pgtables */
        phys_to_ttbr x5, x0
 alternative_if ARM64_HAS_CNP
-       orr     x5, x5, #TTBR_CNP_BIT
+       orr     x5, x5, #TTBRx_EL1_CnP
 alternative_else_nop_endif
        msr     ttbr0_el2, x5
 

diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index 718c495832d0a582747e3f230dcf0d1b25c5d29f..0f4a28b874692dde4e6a9c0b566e8f44b47b9c6b 100644 (file)
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -354,7 +354,7 @@ void cpu_do_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm)
 
        /* Skip CNP for the reserved ASID */
        if (system_supports_cnp() && asid)
-               ttbr0 |= TTBR_CNP_BIT;
+               ttbr0 |= TTBRx_EL1_CnP;
 
        /* SW PAN needs a copy of the ASID in TTBR0 for entry */
        if (IS_ENABLED(CONFIG_ARM64_SW_TTBR0_PAN))

diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index a6a00accf4f9380ca17fa3be2aee6abf17009e12..c22678769c37d7b079c5fe526a305a13f4a5477b 100644 (file)
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -2188,7 +2188,7 @@ void __cpu_replace_ttbr1(pgd_t *pgdp, bool cnp)
        phys_addr_t ttbr1 = phys_to_ttbr(virt_to_phys(pgdp));
 
        if (cnp)
-               ttbr1 |= TTBR_CNP_BIT;
+               ttbr1 |= TTBRx_EL1_CnP;
 
        replace_phys = (void *)__pa_symbol(idmap_cpu_replace_ttbr1);