arm64: dts: qcom: qcs8300: Add EPSS l3 interconnect provider node and CPUCP OPP table...

Add Epoch Subsystem (EPSS) L3 interconnect provider node and OPP tables
required to scale DDR and L3 per freq-domain on QCS8300 platform.
As QCS8300 and SA8775P SoCs have same EPSS hardware, added SA8775P
compatible as fallback for QCS8300 EPSS device node.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Co-developed-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250722055039.135140-2-raviteja.laggyshetty@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 7ada029c32c1f2d0488a3fd1be603887c64bf4f9..7d38ddd2cc9e42940899864c6bb52ea0f2f39dc0 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -12,6 +12,7 @@
 #include <dt-bindings/dma/qcom-gpi.h>
 #include <dt-bindings/firmware/qcom,scm.h>
 #include <dt-bindings/interconnect/qcom,icc.h>
+#include <dt-bindings/interconnect/qcom,osm-l3.h>
 #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
@@ -53,6 +54,11 @@
                        capacity-dmips-mhz = <1946>;
                        dynamic-power-coefficient = <472>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
+                       operating-points-v2 = <&cpu0_opp_table>;
+                       interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+                                       <&epss_l3_cl0 MASTER_EPSS_L3_APPS
+                                        &epss_l3_cl0 SLAVE_EPSS_L3_SHARED>;
 
                        l2_0: l2-cache {
                                compatible = "cache";
@@ -73,6 +79,11 @@
                        capacity-dmips-mhz = <1946>;
                        dynamic-power-coefficient = <472>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
+                       operating-points-v2 = <&cpu0_opp_table>;
+                       interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+                                       <&epss_l3_cl0 MASTER_EPSS_L3_APPS
+                                        &epss_l3_cl0 SLAVE_EPSS_L3_SHARED>;
 
                        l2_1: l2-cache {
                                compatible = "cache";
@@ -93,6 +104,11 @@
                        capacity-dmips-mhz = <1946>;
                        dynamic-power-coefficient = <507>;
                        qcom,freq-domain = <&cpufreq_hw 2>;
+                       operating-points-v2 = <&cpu2_opp_table>;
+                       interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+                                       <&epss_l3_cl0 MASTER_EPSS_L3_APPS
+                                        &epss_l3_cl0 SLAVE_EPSS_L3_SHARED>;
 
                        l2_2: l2-cache {
                                compatible = "cache";
@@ -113,6 +129,11 @@
                        capacity-dmips-mhz = <1946>;
                        dynamic-power-coefficient = <507>;
                        qcom,freq-domain = <&cpufreq_hw 2>;
+                       operating-points-v2 = <&cpu2_opp_table>;
+                       interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+                                       <&epss_l3_cl0 MASTER_EPSS_L3_APPS
+                                        &epss_l3_cl0 SLAVE_EPSS_L3_SHARED>;
 
                        l2_3: l2-cache {
                                compatible = "cache";
@@ -133,6 +154,11 @@
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <100>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
+                       operating-points-v2 = <&cpu4_opp_table>;
+                       interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+                                       <&epss_l3_cl1 MASTER_EPSS_L3_APPS
+                                        &epss_l3_cl1 SLAVE_EPSS_L3_SHARED>;
 
                        l2_4: l2-cache {
                                compatible = "cache";
@@ -153,6 +179,11 @@
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <100>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
+                       operating-points-v2 = <&cpu4_opp_table>;
+                       interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+                                       <&epss_l3_cl1 MASTER_EPSS_L3_APPS
+                                        &epss_l3_cl1 SLAVE_EPSS_L3_SHARED>;
 
                        l2_5: l2-cache {
                                compatible = "cache";
@@ -173,6 +204,11 @@
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <100>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
+                       operating-points-v2 = <&cpu4_opp_table>;
+                       interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+                                       <&epss_l3_cl1 MASTER_EPSS_L3_APPS
+                                        &epss_l3_cl1 SLAVE_EPSS_L3_SHARED>;
 
                        l2_6: l2-cache {
                                compatible = "cache";
@@ -193,6 +229,11 @@
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <100>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
+                       operating-points-v2 = <&cpu4_opp_table>;
+                       interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+                                       <&epss_l3_cl1 MASTER_EPSS_L3_APPS
+                                        &epss_l3_cl1 SLAVE_EPSS_L3_SHARED>;
 
                        l2_7: l2-cache {
                                compatible = "cache";
@@ -323,6 +364,248 @@
                };
        };
 
+       cpu0_opp_table: opp-table-cpu0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-902400000 {
+                       opp-hz = /bits/ 64 <902400000>;
+                       opp-peak-kBps = <(681600 * 4) (921600 * 32)>;
+               };
+
+               opp-1017600000 {
+                       opp-hz = /bits/ 64 <1017600000>;
+                       opp-peak-kBps = <(1017600 * 4) (921600 * 32)>;
+               };
+
+               opp-1190400000 {
+                       opp-hz = /bits/ 64 <1190400000>;
+                       opp-peak-kBps = <(1708800 * 4) (921600 * 32)>;
+               };
+
+               opp-1267200000 {
+                       opp-hz = /bits/ 64 <1267200000>;
+                       opp-peak-kBps = <(2092800 * 4) (998400 * 32)>;
+               };
+
+               opp-1344000000 {
+                       opp-hz = /bits/ 64 <1344000000>;
+                       opp-peak-kBps = <(2092800 * 4) (1075200 * 32)>;
+               };
+
+               opp-1420800000 {
+                       opp-hz = /bits/ 64 <1420800000>;
+                       opp-peak-kBps = <(2092800 * 4) (1152000 * 32)>;
+               };
+
+               opp-1497600000 {
+                       opp-hz = /bits/ 64 <1497600000>;
+                       opp-peak-kBps = <(2092800 * 4) (1228800 * 32)>;
+               };
+
+               opp-1574400000 {
+                       opp-hz = /bits/ 64 <1574400000>;
+                       opp-peak-kBps = <(2736000 * 4) (1324800 * 32)>;
+               };
+
+               opp-1670400000 {
+                       opp-hz = /bits/ 64 <1670400000>;
+                       opp-peak-kBps = <(2736000 * 4) (1401600 * 32)>;
+               };
+
+               opp-1747200000 {
+                       opp-hz = /bits/ 64 <1747200000>;
+                       opp-peak-kBps = <(2736000 * 4) (1401600 * 32)>;
+               };
+
+               opp-1824000000 {
+                       opp-hz = /bits/ 64 <1824000000>;
+                       opp-peak-kBps = <(2736000 * 4) (1478400 * 32)>;
+               };
+
+               opp-1900800000 {
+                       opp-hz = /bits/ 64 <1900800000>;
+                       opp-peak-kBps = <(2736000 * 4) (1478400 * 32)>;
+               };
+
+               opp-1977600000 {
+                       opp-hz = /bits/ 64 <1977600000>;
+                       opp-peak-kBps = <(3196800 * 4) (1555200 * 32)>;
+               };
+
+               opp-2054400000 {
+                       opp-hz = /bits/ 64 <2054400000>;
+                       opp-peak-kBps = <(3196800 * 4) (1555200 * 32)>;
+               };
+
+               opp-2112000000 {
+                       opp-hz = /bits/ 64 <2112000000>;
+                       opp-peak-kBps = <(3196800 * 4) (1612800 * 32)>;
+               };
+
+       };
+
+       cpu2_opp_table: opp-table-cpu2 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-940800000 {
+                       opp-hz = /bits/ 64 <940800000>;
+                       opp-peak-kBps = <(681600 * 4) (921600 * 32)>;
+               };
+
+               opp-1094400000 {
+                       opp-hz = /bits/ 64 <1094400000>;
+                       opp-peak-kBps = <(1017600 * 4) (921600 * 32)>;
+               };
+
+               opp-1267200000 {
+                       opp-hz = /bits/ 64 <1267200000>;
+                       opp-peak-kBps = <(1708800 * 4) (921600 * 32)>;
+               };
+
+               opp-1344000000 {
+                       opp-hz = /bits/ 64 <1344000000>;
+                       opp-peak-kBps = <(2092800 * 4) (998400 * 32)>;
+               };
+
+               opp-1420800000 {
+                       opp-hz = /bits/ 64 <1420800000>;
+                       opp-peak-kBps = <(2092800 * 4) (998400 * 32)>;
+               };
+
+               opp-1497600000 {
+                       opp-hz = /bits/ 64 <1497600000>;
+                       opp-peak-kBps = <(2092800 * 4) (1075200 * 32)>;
+               };
+
+               opp-1574400000 {
+                       opp-hz = /bits/ 64 <1574400000>;
+                       opp-peak-kBps = <(2092800 * 4) (1152000 * 32)>;
+               };
+
+               opp-1632000000 {
+                       opp-hz = /bits/ 64 <1632000000>;
+                       opp-peak-kBps = <(2092800 * 4) (1228800 * 32)>;
+               };
+
+               opp-1708800000 {
+                       opp-hz = /bits/ 64 <1708800000>;
+                       opp-peak-kBps = <(2736000 * 4) (1324800 * 32)>;
+               };
+
+               opp-1804800000 {
+                       opp-hz = /bits/ 64 <1804800000>;
+                       opp-peak-kBps = <(2736000 * 4) (1324800 * 32)>;
+               };
+
+               opp-1900800000 {
+                       opp-hz = /bits/ 64 <1900800000>;
+                       opp-peak-kBps = <(2736000 * 4) (1324800 * 32)>;
+               };
+
+               opp-1977600000 {
+                       opp-hz = /bits/ 64 <1977600000>;
+                       opp-peak-kBps = <(2736000 * 4) (1401600 * 32)>;
+               };
+
+               opp-2054400000 {
+                       opp-hz = /bits/ 64 <2054400000>;
+                       opp-peak-kBps = <(2736000 * 4) (1478400 * 32)>;
+               };
+
+               opp-2131200000 {
+                       opp-hz = /bits/ 64 <2131200000>;
+                       opp-peak-kBps = <(3196800 * 4) (1555200 * 32)>;
+               };
+
+               opp-2208000000 {
+                       opp-hz = /bits/ 64 <2208000000>;
+                       opp-peak-kBps = <(3196800 * 4) (1555200 * 32)>;
+               };
+
+               opp-2284800000 {
+                       opp-hz = /bits/ 64 <2284800000>;
+                       opp-peak-kBps = <(3196800 * 4) (1612800 * 32)>;
+               };
+
+               opp-2361600000 {
+                       opp-hz = /bits/ 64 <2361600000>;
+                       opp-peak-kBps = <(3196800 * 4) (1612800 * 32)>;
+               };
+
+       };
+
+       cpu4_opp_table: opp-table-cpu4 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-844800000 {
+                       opp-hz = /bits/ 64 <844800000>;
+                       opp-peak-kBps = <(681600 * 4) (921600 * 32)>;
+               };
+
+               opp-1113600000 {
+                       opp-hz = /bits/ 64 <1113600000>;
+                       opp-peak-kBps = <(1708800 * 4) (921600 * 32)>;
+               };
+
+               opp-1209600000 {
+                       opp-hz = /bits/ 64 <1209600000>;
+                       opp-peak-kBps = <(2092800 * 4) (998400 * 32)>;
+               };
+
+               opp-1305600000 {
+                       opp-hz = /bits/ 64 <1305600000>;
+                       opp-peak-kBps = <(2092800 * 4) (1075200 * 32)>;
+               };
+
+               opp-1382400000 {
+                       opp-hz = /bits/ 64 <1382400000>;
+                       opp-peak-kBps = <(2092800 * 4) (1152000 * 32)>;
+               };
+
+               opp-1459200000 {
+                       opp-hz = /bits/ 64 <1459200000>;
+                       opp-peak-kBps = <(2092800 * 4) (1228800 * 32)>;
+               };
+
+               opp-1497600000 {
+                       opp-hz = /bits/ 64 <1497600000>;
+                       opp-peak-kBps = <(2736000 * 4) (1324800 * 32)>;
+               };
+
+               opp-1574400000 {
+                       opp-hz = /bits/ 64 <1574400000>;
+                       opp-peak-kBps = <(2736000 * 4) (1324800 * 32)>;
+               };
+
+               opp-1651200000 {
+                       opp-hz = /bits/ 64 <1651200000>;
+                       opp-peak-kBps = <(2736000 * 4) (1324800 * 32)>;
+               };
+
+               opp-1728000000 {
+                       opp-hz = /bits/ 64 <1728000000>;
+                       opp-peak-kBps = <(2736000 * 4) (1401600 * 32)>;
+               };
+
+               opp-1804800000 {
+                       opp-hz = /bits/ 64 <1804800000>;
+                       opp-peak-kBps = <(2736000 * 4) (1478400 * 32)>;
+               };
+
+               opp-1881600000 {
+                       opp-hz = /bits/ 64 <1881600000>;
+                       opp-peak-kBps = <(3196800 * 4) (1555200 * 32)>;
+               };
+
+               opp-1958400000 {
+                       opp-hz = /bits/ 64 <1958400000>;
+                       opp-peak-kBps = <(3196800 * 4) (1612800 * 32)>;
+               };
+       };
+
        dummy_eud: dummy-sink {
                compatible = "arm,coresight-dummy-sink";
 
@@ -5433,6 +5716,15 @@
                        };
                };
 
+               epss_l3_cl0: interconnect@18590000 {
+                       compatible = "qcom,qcs8300-epss-l3", "qcom,sa8775p-epss-l3",
+                                    "qcom,epss-l3";
+                       reg = <0x0 0x18590000 0x0 0x1000>;
+                       clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
+                       clock-names = "xo", "alternate";
+                       #interconnect-cells = <1>;
+               };
+
                cpufreq_hw: cpufreq@18591000 {
                        compatible = "qcom,qcs8300-cpufreq-epss", "qcom,cpufreq-epss";
                        reg = <0x0 0x18591000 0x0 0x1000>,
@@ -5455,6 +5747,15 @@
                        #freq-domain-cells = <1>;
                };
 
+               epss_l3_cl1: interconnect@18592000 {
+                       compatible = "qcom,qcs8300-epss-l3", "qcom,sa8775p-epss-l3",
+                                    "qcom,epss-l3";
+                       reg = <0x0 0x18592000 0x0 0x1000>;
+                       clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
+                       clock-names = "xo", "alternate";
+                       #interconnect-cells = <1>;
+               };
+
                remoteproc_gpdsp: remoteproc@20c00000 {
                        compatible = "qcom,qcs8300-gpdsp-pas", "qcom,sa8775p-gpdsp0-pas";
                        reg = <0x0 0x20c00000 0x0 0x10000>;