5.10-stable patches

added patches:
	perf-script-check-session-header.env.arch-before-using-it.patch
	riscv-fix-asan-stack-clang-build.patch
	riscv-fix-misalgned-trap-vector-base-address.patch

diff --git a/queue-5.10/perf-script-check-session-header.env.arch-before-using-it.patch b/queue-5.10/perf-script-check-session-header.env.arch-before-using-it.patch
new file mode 100644 (file)
index 0000000..a6a7654
--- /dev/null
+++ b/queue-5.10/perf-script-check-session-header.env.arch-before-using-it.patch
@@ -0,0 +1,56 @@
+From 29c77550eef31b0d72a45b49eeab03b8963264e8 Mon Sep 17 00:00:00 2001
+From: Song Liu <songliubraving@fb.com>
+Date: Sun, 3 Oct 2021 22:32:38 -0700
+Subject: perf script: Check session->header.env.arch before using it
+
+From: Song Liu <songliubraving@fb.com>
+
+commit 29c77550eef31b0d72a45b49eeab03b8963264e8 upstream.
+
+When perf.data is not written cleanly, we would like to process existing
+data as much as possible (please see f_header.data.size == 0 condition
+in perf_session__read_header). However, perf.data with partial data may
+crash perf. Specifically, we see crash in 'perf script' for NULL
+session->header.env.arch.
+
+Fix this by checking session->header.env.arch before using it to determine
+native_arch. Also split the if condition so it is easier to read.
+
+Committer notes:
+
+If it is a pipe, we already assume is a native arch, so no need to check
+session->header.env.arch.
+
+Signed-off-by: Song Liu <songliubraving@fb.com>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Cc: kernel-team@fb.com
+Cc: stable@vger.kernel.org
+Link: http://lore.kernel.org/lkml/20211004053238.514936-1-songliubraving@fb.com
+Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ tools/perf/builtin-script.c |   12 ++++++++----
+ 1 file changed, 8 insertions(+), 4 deletions(-)
+
+--- a/tools/perf/builtin-script.c
++++ b/tools/perf/builtin-script.c
+@@ -3820,11 +3820,15 @@ int cmd_script(int argc, const char **ar
+               goto out_delete;
+ 
+       uname(&uts);
+-      if (data.is_pipe ||  /* assume pipe_mode indicates native_arch */
+-          !strcmp(uts.machine, session->header.env.arch) ||
+-          (!strcmp(uts.machine, "x86_64") &&
+-           !strcmp(session->header.env.arch, "i386")))
++      if (data.is_pipe) { /* Assume pipe_mode indicates native_arch */
+               native_arch = true;
++      } else if (session->header.env.arch) {
++              if (!strcmp(uts.machine, session->header.env.arch))
++                      native_arch = true;
++              else if (!strcmp(uts.machine, "x86_64") &&
++                       !strcmp(session->header.env.arch, "i386"))
++                      native_arch = true;
++      }
+ 
+       script.session = session;
+       script__setup_sample_type(&script);

diff --git a/queue-5.10/riscv-fix-asan-stack-clang-build.patch b/queue-5.10/riscv-fix-asan-stack-clang-build.patch
new file mode 100644 (file)
index 0000000..79cf0e6
--- /dev/null
+++ b/queue-5.10/riscv-fix-asan-stack-clang-build.patch
@@ -0,0 +1,65 @@
+From 54c5639d8f507ebefa814f574cb6f763033a72a5 Mon Sep 17 00:00:00 2001
+From: Alexandre Ghiti <alexandre.ghiti@canonical.com>
+Date: Fri, 29 Oct 2021 06:59:27 +0200
+Subject: riscv: Fix asan-stack clang build
+
+From: Alexandre Ghiti <alexandre.ghiti@canonical.com>
+
+commit 54c5639d8f507ebefa814f574cb6f763033a72a5 upstream.
+
+Nathan reported that because KASAN_SHADOW_OFFSET was not defined in
+Kconfig, it prevents asan-stack from getting disabled with clang even
+when CONFIG_KASAN_STACK is disabled: fix this by defining the
+corresponding config.
+
+Reported-by: Nathan Chancellor <nathan@kernel.org>
+Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
+Fixes: 8ad8b72721d0 ("riscv: Add KASAN support")
+Cc: stable@vger.kernel.org
+Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/riscv/Kconfig             |    6 ++++++
+ arch/riscv/include/asm/kasan.h |    3 +--
+ arch/riscv/mm/kasan_init.c     |    3 +++
+ 3 files changed, 10 insertions(+), 2 deletions(-)
+
+--- a/arch/riscv/Kconfig
++++ b/arch/riscv/Kconfig
+@@ -138,6 +138,12 @@ config PAGE_OFFSET
+       default 0xffffffff80000000 if 64BIT && MAXPHYSMEM_2GB
+       default 0xffffffe000000000 if 64BIT && MAXPHYSMEM_128GB
+ 
++config KASAN_SHADOW_OFFSET
++      hex
++      depends on KASAN_GENERIC
++      default 0xdfffffc800000000 if 64BIT
++      default 0xffffffff if 32BIT
++
+ config ARCH_FLATMEM_ENABLE
+       def_bool y
+ 
+--- a/arch/riscv/include/asm/kasan.h
++++ b/arch/riscv/include/asm/kasan.h
+@@ -14,8 +14,7 @@
+ #define KASAN_SHADOW_START    KERN_VIRT_START /* 2^64 - 2^38 */
+ #define KASAN_SHADOW_END      (KASAN_SHADOW_START + KASAN_SHADOW_SIZE)
+ 
+-#define KASAN_SHADOW_OFFSET   (KASAN_SHADOW_END - (1ULL << \
+-                                      (64 - KASAN_SHADOW_SCALE_SHIFT)))
++#define KASAN_SHADOW_OFFSET   _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
+ 
+ void kasan_init(void);
+ asmlinkage void kasan_early_init(void);
+--- a/arch/riscv/mm/kasan_init.c
++++ b/arch/riscv/mm/kasan_init.c
+@@ -16,6 +16,9 @@ asmlinkage void __init kasan_early_init(
+       uintptr_t i;
+       pgd_t *pgd = early_pg_dir + pgd_index(KASAN_SHADOW_START);
+ 
++      BUILD_BUG_ON(KASAN_SHADOW_OFFSET !=
++              KASAN_SHADOW_END - (1UL << (64 - KASAN_SHADOW_SCALE_SHIFT)));
++
+       for (i = 0; i < PTRS_PER_PTE; ++i)
+               set_pte(kasan_early_shadow_pte + i,
+                       mk_pte(virt_to_page(kasan_early_shadow_page),

diff --git a/queue-5.10/riscv-fix-misalgned-trap-vector-base-address.patch b/queue-5.10/riscv-fix-misalgned-trap-vector-base-address.patch
new file mode 100644 (file)
index 0000000..c6d1e60
--- /dev/null
+++ b/queue-5.10/riscv-fix-misalgned-trap-vector-base-address.patch
@@ -0,0 +1,33 @@
+From 64a19591a2938b170aa736443d5d3bf4c51e1388 Mon Sep 17 00:00:00 2001
+From: Chen Lu <181250012@smail.nju.edu.cn>
+Date: Mon, 18 Oct 2021 13:22:38 +0800
+Subject: riscv: fix misalgned trap vector base address
+
+From: Chen Lu <181250012@smail.nju.edu.cn>
+
+commit 64a19591a2938b170aa736443d5d3bf4c51e1388 upstream.
+
+The trap vector marked by label .Lsecondary_park must align on a
+4-byte boundary, as the {m,s}tvec is defined to require 4-byte
+alignment.
+
+Signed-off-by: Chen Lu <181250012@smail.nju.edu.cn>
+Reviewed-by: Anup Patel <anup.patel@wdc.com>
+Fixes: e011995e826f ("RISC-V: Move relocate and few other functions out of __init")
+Cc: stable@vger.kernel.org
+Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/riscv/kernel/head.S |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/riscv/kernel/head.S
++++ b/arch/riscv/kernel/head.S
+@@ -175,6 +175,7 @@ setup_trap_vector:
+       csrw CSR_SCRATCH, zero
+       ret
+ 
++.align 2
+ .Lsecondary_park:
+       /* We lack SMP support or have too many harts, so park this hart */
+       wfi

diff --git a/queue-5.10/series b/queue-5.10/series
index b45f9ba66de4758a3da1bea0385f628181773c3e..317f7fd87b9e57e80437e2cdfd659cebf6c25ad3 100644 (file)
--- a/queue-5.10/series
+++ b/queue-5.10/series
@@ -72,3 +72,6 @@ lan743x-fix-endianness-when-accessing-descriptors.patch
 kvm-s390-clear-kicked_mask-before-sleeping-again.patch
 kvm-s390-preserve-deliverable_mask-in-__airqs_kick_s.patch
 scsi-ufs-ufs-exynos-correct-timeout-value-setting-re.patch
+riscv-fix-misalgned-trap-vector-base-address.patch
+riscv-fix-asan-stack-clang-build.patch
+perf-script-check-session-header.env.arch-before-using-it.patch