]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
gpio: hisi: use new generic GPIO chip API
authorBartosz Golaszewski <bartosz.golaszewski@linaro.org>
Tue, 26 Aug 2025 09:35:11 +0000 (11:35 +0200)
committerBartosz Golaszewski <bartosz.golaszewski@linaro.org>
Wed, 3 Sep 2025 07:37:47 +0000 (09:37 +0200)
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250826-gpio-mmio-gpio-conv-part2-v1-10-f67603e4b27e@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
drivers/gpio/gpio-hisi.c

index 6016e6f0ed0fb80ea670ebb575452d9ec23976fa..01a99ac613d94e933d30f782520776693f048d1c 100644 (file)
@@ -1,6 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /* Copyright (c) 2020 HiSilicon Limited. */
+
 #include <linux/gpio/driver.h>
+#include <linux/gpio/generic.h>
 #include <linux/module.h>
 #include <linux/mod_devicetable.h>
 #include <linux/platform_device.h>
@@ -33,7 +35,7 @@
 #define HISI_GPIO_DRIVER_NAME  "gpio-hisi"
 
 struct hisi_gpio {
-       struct gpio_chip        chip;
+       struct gpio_generic_chip chip;
        struct device           *dev;
        void __iomem            *reg_base;
        unsigned int            line_num;
@@ -43,8 +45,8 @@ struct hisi_gpio {
 static inline u32 hisi_gpio_read_reg(struct gpio_chip *chip,
                                     unsigned int off)
 {
-       struct hisi_gpio *hisi_gpio =
-                       container_of(chip, struct hisi_gpio, chip);
+       struct hisi_gpio *hisi_gpio = container_of(to_gpio_generic_chip(chip),
+                                                  struct hisi_gpio, chip);
        void __iomem *reg = hisi_gpio->reg_base + off;
 
        return readl(reg);
@@ -53,8 +55,8 @@ static inline u32 hisi_gpio_read_reg(struct gpio_chip *chip,
 static inline void hisi_gpio_write_reg(struct gpio_chip *chip,
                                       unsigned int off, u32 val)
 {
-       struct hisi_gpio *hisi_gpio =
-                       container_of(chip, struct hisi_gpio, chip);
+       struct hisi_gpio *hisi_gpio = container_of(to_gpio_generic_chip(chip),
+                                                  struct hisi_gpio, chip);
        void __iomem *reg = hisi_gpio->reg_base + off;
 
        writel(val, reg);
@@ -180,14 +182,14 @@ static void hisi_gpio_irq_disable(struct irq_data *d)
 static void hisi_gpio_irq_handler(struct irq_desc *desc)
 {
        struct hisi_gpio *hisi_gpio = irq_desc_get_handler_data(desc);
-       unsigned long irq_msk = hisi_gpio_read_reg(&hisi_gpio->chip,
+       unsigned long irq_msk = hisi_gpio_read_reg(&hisi_gpio->chip.gc,
                                                   HISI_GPIO_INTSTATUS_WX);
        struct irq_chip *irq_c = irq_desc_get_chip(desc);
        int hwirq;
 
        chained_irq_enter(irq_c, desc);
        for_each_set_bit(hwirq, &irq_msk, HISI_GPIO_LINE_NUM_MAX)
-               generic_handle_domain_irq(hisi_gpio->chip.irq.domain,
+               generic_handle_domain_irq(hisi_gpio->chip.gc.irq.domain,
                                          hwirq);
        chained_irq_exit(irq_c, desc);
 }
@@ -206,7 +208,7 @@ static const struct irq_chip hisi_gpio_irq_chip = {
 
 static void hisi_gpio_init_irq(struct hisi_gpio *hisi_gpio)
 {
-       struct gpio_chip *chip = &hisi_gpio->chip;
+       struct gpio_chip *chip = &hisi_gpio->chip.gc;
        struct gpio_irq_chip *girq_chip = &chip->irq;
 
        gpio_irq_chip_set_chip(girq_chip, &hisi_gpio_irq_chip);
@@ -264,6 +266,7 @@ static void hisi_gpio_get_pdata(struct device *dev,
 
 static int hisi_gpio_probe(struct platform_device *pdev)
 {
+       struct gpio_generic_chip_config config;
        struct device *dev = &pdev->dev;
        struct hisi_gpio *hisi_gpio;
        int port_num;
@@ -289,26 +292,31 @@ static int hisi_gpio_probe(struct platform_device *pdev)
 
        hisi_gpio->dev = dev;
 
-       ret = bgpio_init(&hisi_gpio->chip, hisi_gpio->dev, 0x4,
-                        hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX,
-                        hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX,
-                        hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_CLR_WX,
-                        hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_SET_WX,
-                        hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_CLR_WX,
-                        BGPIOF_NO_SET_ON_INPUT | BGPIOF_UNREADABLE_REG_DIR);
+       config = (typeof(config)){
+               .dev = hisi_gpio->dev,
+               .sz = 4,
+               .dat = hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX,
+               .set = hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX,
+               .clr = hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_CLR_WX,
+               .dirout = hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_SET_WX,
+               .dirin = hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_CLR_WX,
+               .flags = BGPIOF_NO_SET_ON_INPUT | BGPIOF_UNREADABLE_REG_DIR,
+       };
+
+       ret = gpio_generic_chip_init(&hisi_gpio->chip, &config);
        if (ret) {
                dev_err(dev, "failed to init, ret = %d\n", ret);
                return ret;
        }
 
-       hisi_gpio->chip.set_config = hisi_gpio_set_config;
-       hisi_gpio->chip.ngpio = hisi_gpio->line_num;
-       hisi_gpio->chip.base = -1;
+       hisi_gpio->chip.gc.set_config = hisi_gpio_set_config;
+       hisi_gpio->chip.gc.ngpio = hisi_gpio->line_num;
+       hisi_gpio->chip.gc.base = -1;
 
        if (hisi_gpio->irq > 0)
                hisi_gpio_init_irq(hisi_gpio);
 
-       ret = devm_gpiochip_add_data(dev, &hisi_gpio->chip, hisi_gpio);
+       ret = devm_gpiochip_add_data(dev, &hisi_gpio->chip.gc, hisi_gpio);
        if (ret) {
                dev_err(dev, "failed to register gpiochip, ret = %d\n", ret);
                return ret;