]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
mmc: sdhci-pci-core: Disable ES for ASUS BIOS on Jasper Lake
authorPatrick Thompson <ptf@google.com>
Thu, 13 Oct 2022 21:00:17 +0000 (17:00 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 3 Nov 2022 15:00:23 +0000 (00:00 +0900)
commit 9dc0033e4658d6f9d9952c3c0c6be3ec25bc2985 upstream.

Enhanced Strobe (ES) does not work correctly on the ASUS 1100 series of
devices. Jasper Lake eMMCs (pci_id 8086:4dc4) are supposed to support
ES. There are also two system families under the series, thus this is
being scoped to the ASUS BIOS.

The failing ES prevents the installer from writing to disk. Falling back
to HS400 without ES fixes the issue.

Signed-off-by: Patrick Thompson <ptf@google.com>
Fixes: 315e3bd7ac19 ("mmc: sdhci-pci: Add support for Intel JSL")
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20221013210017.3751025-1-ptf@google.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/mmc/host/sdhci-pci-core.c

index 622b7de96c7f679428a7f9d0107d8f81a52c8431..b6f4bd3d93cd853a8cd9be86054910602fe297e7 100644 (file)
@@ -893,6 +893,12 @@ static bool glk_broken_cqhci(struct sdhci_pci_slot *slot)
                dmi_match(DMI_SYS_VENDOR, "IRBIS"));
 }
 
+static bool jsl_broken_hs400es(struct sdhci_pci_slot *slot)
+{
+       return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_JSL_EMMC &&
+                       dmi_match(DMI_BIOS_VENDOR, "ASUSTeK COMPUTER INC.");
+}
+
 static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
 {
        int ret = byt_emmc_probe_slot(slot);
@@ -901,9 +907,11 @@ static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
                slot->host->mmc->caps2 |= MMC_CAP2_CQE;
 
        if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) {
-               slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES;
-               slot->host->mmc_host_ops.hs400_enhanced_strobe =
-                                               intel_hs400_enhanced_strobe;
+               if (!jsl_broken_hs400es(slot)) {
+                       slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES;
+                       slot->host->mmc_host_ops.hs400_enhanced_strobe =
+                                                       intel_hs400_enhanced_strobe;
+               }
                slot->host->mmc->caps2 |= MMC_CAP2_CQE_DCMD;
        }