arm64: dts: qcom: sm8650: Add ACD levels for GPU

Update GPU node to include acd level values.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250729-topic-sm8650-upstream-gpu-acd-level-v1-1-258090038a41@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 34ec162db53dd62b7edbca3a3b176ba4ee31a83a..d6794901f06b50e8629afd081cb7d229ea342f84 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -4127,72 +4127,84 @@
 
                        /* Speedbin needs more work on A740+, keep only lower freqs */
                        gpu_opp_table: opp-table {
-                               compatible = "operating-points-v2";
+                               compatible = "operating-points-v2-adreno",
+                                            "operating-points-v2";
 
                                opp-231000000 {
                                        opp-hz = /bits/ 64 <231000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;
                                        opp-peak-kBps = <2136718>;
+                                       qcom,opp-acd-level = <0xc82f5ffd>;
                                };
 
                                opp-310000000 {
                                        opp-hz = /bits/ 64 <310000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
                                        opp-peak-kBps = <2136718>;
+                                       qcom,opp-acd-level = <0xc82c5ffd>;
                                };
 
                                opp-366000000 {
                                        opp-hz = /bits/ 64 <366000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D0>;
                                        opp-peak-kBps = <6074218>;
+                                       qcom,opp-acd-level = <0xc02e5ffd>;
                                };
 
                                opp-422000000 {
                                        opp-hz = /bits/ 64 <422000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
                                        opp-peak-kBps = <8171875>;
+                                       qcom,opp-acd-level = <0xc02d5ffd>;
                                };
 
                                opp-500000000 {
                                        opp-hz = /bits/ 64 <500000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
                                        opp-peak-kBps = <8171875>;
+                                       qcom,opp-acd-level = <0xc02a5ffd>;
                                };
 
                                opp-578000000 {
                                        opp-hz = /bits/ 64 <578000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
                                        opp-peak-kBps = <8171875>;
+                                       qcom,opp-acd-level = <0x882c5ffd>;
                                };
 
                                opp-629000000 {
                                        opp-hz = /bits/ 64 <629000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
                                        opp-peak-kBps = <10687500>;
+                                       qcom,opp-acd-level = <0x882a5ffd>;
                                };
 
                                opp-680000000 {
                                        opp-hz = /bits/ 64 <680000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
                                        opp-peak-kBps = <12449218>;
+                                       qcom,opp-acd-level = <0x882a5ffd>;
                                };
 
                                opp-720000000 {
                                        opp-hz = /bits/ 64 <720000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
                                        opp-peak-kBps = <12449218>;
+                                       qcom,opp-acd-level = <0x882a5ffd>;
                                };
 
                                opp-770000000 {
                                        opp-hz = /bits/ 64 <770000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
                                        opp-peak-kBps = <12449218>;
+                                       qcom,opp-acd-level = <0x882a5ffd>;
                                };
 
                                opp-834000000 {
                                        opp-hz = /bits/ 64 <834000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
                                        opp-peak-kBps = <14398437>;
+                                       qcom,opp-acd-level = <0x882a5ffd>;
                                };
                        };
                };