]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/xe/nvm: fix writable override for CRI
authorAlexander Usyskin <alexander.usyskin@intel.com>
Tue, 14 Jul 2026 05:54:17 +0000 (08:54 +0300)
committerThomas Hellström <thomas.hellstrom@linux.intel.com>
Thu, 16 Jul 2026 14:32:40 +0000 (16:32 +0200)
The witable override should be set when FDO_MODE bit is enabled.
Fix the comparison to distingush this case from legacy systems
where bit should be disabled to have override.

Cc: stable@vger.kernel.org
Fixes: 9dde74fd9e65 ("drm/xe/nvm: enable cri platform")
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/20260714-cri_nvm_fdo_flip-v2-1-14580e71b58e@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
(cherry picked from commit 2007be18d2318a59748da5da1b8968042213d5f1)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
drivers/gpu/drm/xe/xe_nvm.c

index 33487e91f366cafc0c7e5bafa14aa10318f0905c..1ea67eaeae2437e13b67f47ca1b897cfbfd3b44d 100644 (file)
@@ -60,35 +60,40 @@ static bool xe_nvm_writable_override(struct xe_device *xe)
        struct xe_mmio *mmio = xe_root_tile_mmio(xe);
        bool writable_override;
        struct xe_reg reg;
-       u32 test_bit;
+       u32 test_bit, test_val;
 
        switch (xe->info.platform) {
        case XE_CRESCENTISLAND:
                reg = PCODE_SCRATCH(0);
                test_bit = FDO_MODE;
+               test_val = FDO_MODE;
                break;
        case XE_BATTLEMAGE:
                reg = HECI_FWSTS2(DG2_GSC_HECI2_BASE);
                test_bit = HECI_FW_STATUS_2_NVM_ACCESS_MODE;
+               test_val = 0;
                break;
        case XE_PVC:
                reg = HECI_FWSTS2(PVC_GSC_HECI2_BASE);
                test_bit = HECI_FW_STATUS_2_NVM_ACCESS_MODE;
+               test_val = 0;
                break;
        case XE_DG2:
                reg = HECI_FWSTS2(DG2_GSC_HECI2_BASE);
                test_bit = HECI_FW_STATUS_2_NVM_ACCESS_MODE;
+               test_val = 0;
                break;
        case XE_DG1:
                reg = HECI_FWSTS2(DG1_GSC_HECI2_BASE);
                test_bit = HECI_FW_STATUS_2_NVM_ACCESS_MODE;
+               test_val = 0;
                break;
        default:
                drm_err(&xe->drm, "Unknown platform\n");
                return true;
        }
 
-       writable_override = !(xe_mmio_read32(mmio, reg) & test_bit);
+       writable_override = (xe_mmio_read32(mmio, reg) & test_bit) == test_val;
        if (writable_override)
                drm_info(&xe->drm, "NVM access overridden by jumper\n");
        return writable_override;