arch: mach-k3: j784s4_init: Add workaround for errata i2437

Add the workaround proposed for J784S4 errata i2437 (link) for SE
clock-gating turning off too early. Without this, a hardware bug present
in C7120 leads to C7120 CPU hanging.

Link: https://www.ti.com/lit/pdf/sprz536
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>

diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c
index 53f152ccd9c6dd7c5129669ece9ab92a9eb6f0ad..507b7ab685ad89888f00d38d5199176d319cae95 100644 (file)
--- a/arch/arm/mach-k3/j784s4/j784s4_init.c
+++ b/arch/arm/mach-k3/j784s4/j784s4_init.c
@@ -45,6 +45,15 @@
 #define NB_THREADMAP_BIT1                              BIT(1)
 #define NB_THREADMAP_BIT2                              BIT(2)
 
+/*
+ * RAT mapping for errata ID: i2437
+ */
+#define RAT_ERRATA_2437_BASE_REGION0           0x40f90000
+#define RAT_ERRATA_2437_IN_ADDR                        0xc0000000
+#define RAT_ERRATA_2437_OUT_ADDR_U             0x0000004d
+#define RAT_ERRATA_2437_OUT_ADDR_L             0x21000000
+#define RAT_ERRATA_2437_CTRL                   0x80000010
+
 struct fwl_data infra_cbass0_fwls[] = {
        { "PSC0", 5, 1 },
        { "PLL_CTRL0", 6, 1 },
@@ -322,6 +331,36 @@ void board_init_f(ulong dummy)
                setup_navss_nb();
 
        setup_qos();
+
+       if (IS_ENABLED(CONFIG_CPU_V7R)) {
+               /*
+                * Errata ID i2437 SE Clock-Gating Turning Off Too Early
+                *
+                * A hardware bug is present in the C7120 Streaming Engine top level
+                * clock gating logic that can lead to the C7120 CPU hanging.
+
+                * Workaround: The DSP_<COREID>_DEBUG_CLKEN_OVERRIDE fields of the
+                * COMPUTE_CLUSTER_CFG_WRAP_0_CC_CNTRL register (where COREID is the
+                * name of the specific C7120 core) must be enabled before power-up
+                * of the C7120 core to override all clock-gating.
+                */
+
+               /* Setup RAT mapping */
+               debug("Errata i2437: Use RAT for COMPUTE_CLUSTER_CFG_WRAP_0_CC_CNTRL register\n");
+               writel_verify(RAT_ERRATA_2437_IN_ADDR, RAT_ERRATA_2437_BASE_REGION0 + 0x24);
+               writel_verify(RAT_ERRATA_2437_OUT_ADDR_L, RAT_ERRATA_2437_BASE_REGION0 + 0x28);
+               writel_verify(RAT_ERRATA_2437_OUT_ADDR_U, RAT_ERRATA_2437_BASE_REGION0 + 0x2c);
+               writel_verify(RAT_ERRATA_2437_CTRL, RAT_ERRATA_2437_BASE_REGION0 + 0x20);
+
+               /* Enable DSP_X_DEBUG_CLKEN_OVERRIDE for C71x cores */
+               writel_verify(0xF00, RAT_ERRATA_2437_IN_ADDR + 0x200);
+
+               /* Clear RAT mapping */
+               writel_verify(0, RAT_ERRATA_2437_BASE_REGION0 + 0x20);
+               writel_verify(0, RAT_ERRATA_2437_BASE_REGION0 + 0x24);
+               writel_verify(0, RAT_ERRATA_2437_BASE_REGION0 + 0x28);
+               writel_verify(0, RAT_ERRATA_2437_BASE_REGION0 + 0x2c);
+       }
 }
 
 u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)