arm64: dts: renesas: r9a09g077: Add SDHI nodes

Add the SDHI0-SDHI1 nodes to the RZ/T2H ("R9A09G077") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250707153533.287832-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
index 0583a26ecbc4eca8cd5dad879590ff8abbbe1dbc..b16fd9259d8de9ce9fd7caa1e17f1819b551d885 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
@@ -155,6 +155,46 @@
                        interrupt-controller;
                        interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
                };
+
+               sdhi0: mmc@92080000  {
+                       compatible = "renesas,sdhi-r9a09g077",
+                                    "renesas,sdhi-r9a09g057";
+                       reg = <0x0 0x92080000 0 0x10000>;
+                       interrupts = <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 1212>,
+                                <&cpg CPG_CORE R9A09G077_SDHI_CLKHS>;
+                       clock-names = "aclk", "clkh";
+                       power-domains = <&cpg>;
+                       status = "disabled";
+
+                       sdhi0_vqmmc: vqmmc-regulator {
+                               regulator-name = "SDHI0-VQMMC";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               status = "disabled";
+                       };
+               };
+
+               sdhi1: mmc@92090000 {
+                       compatible = "renesas,sdhi-r9a09g077",
+                                    "renesas,sdhi-r9a09g057";
+                       reg = <0x0 0x92090000 0 0x10000>;
+                       interrupts = <GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 1213>,
+                                <&cpg CPG_CORE R9A09G077_SDHI_CLKHS>;
+                       clock-names = "aclk", "clkh";
+                       power-domains = <&cpg>;
+                       status = "disabled";
+
+                       sdhi1_vqmmc: vqmmc-regulator {
+                               regulator-name = "SDHI1-VQMMC";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               status = "disabled";
+                       };
+               };
        };
 
        timer {