arm64: zynqmp: Correct USB bus and ref clock nodes

Currently usb "bus_clk" & "ref_clk" nodes are wrongly mapped.
This patch fixes the USB0/1 bus and ref clock nodes

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index 5386fe969f67b5be7d9c72ec82f4f2c81d52a117..c8b18d2695bb28cfefa0a12970a786f242df1ac4 100644 (file)
--- a/arch/arm/dts/zynqmp-clk-ccf.dtsi
+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi
@@ -230,11 +230,11 @@
 };
 
 &usb0 {
-       clocks = <&clkc 32>,  <&clkc 31>;
+       clocks = <&clkc 33>,  <&clkc 31>;
 };
 
 &usb1 {
-       clocks = <&clkc 33>,  <&clkc 36>;
+       clocks = <&clkc 33>,  <&clkc 32>;
 };
 
 &watchdog0 {